From: Paolo Bonzini <pbonzini@redhat.com>
To: Wanpeng Li <kernellwp@gmail.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: Sean Christopherson <seanjc@google.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>
Subject: Re: [PATCH v2 1/3] KVM: LAPIC: Write 0 to TMICT should also cancel vmx-preemption timer
Date: Tue, 8 Jun 2021 18:27:45 +0200 [thread overview]
Message-ID: <9a95474c-5430-83d5-db65-2909191bd9f5@redhat.com> (raw)
In-Reply-To: <1623050385-100988-1-git-send-email-wanpengli@tencent.com>
On 07/06/21 09:19, Wanpeng Li wrote:
> From: Wanpeng Li <wanpengli@tencent.com>
>
> According to the SDM 10.5.4.1:
>
> A write of 0 to the initial-count register effectively stops the local
> APIC timer, in both one-shot and periodic mode.
>
> However, the lapic timer oneshot/periodic mode which is emulated by vmx-preemption
> timer doesn't stop by writing 0 to TMICT since vmx->hv_deadline_tsc is still
> programmed and the guest will receive the spurious timer interrupt later. This
> patch fixes it by also cancelling the vmx-preemption timer when writing 0 to
> the initial-count register.
>
> Reviewed-by: Sean Christopherson <seanjc@google.com>
> Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
> ---
> v1 -> v2:
> * rename to cancel_apic_timer
> * update patch description
>
> arch/x86/kvm/lapic.c | 17 +++++++++++------
> 1 file changed, 11 insertions(+), 6 deletions(-)
>
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index 8120e86..6d72d8f 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -1494,6 +1494,15 @@ static void limit_periodic_timer_frequency(struct kvm_lapic *apic)
>
> static void cancel_hv_timer(struct kvm_lapic *apic);
>
> +static void cancel_apic_timer(struct kvm_lapic *apic)
> +{
> + hrtimer_cancel(&apic->lapic_timer.timer);
> + preempt_disable();
> + if (apic->lapic_timer.hv_timer_in_use)
> + cancel_hv_timer(apic);
> + preempt_enable();
> +}
> +
> static void apic_update_lvtt(struct kvm_lapic *apic)
> {
> u32 timer_mode = kvm_lapic_get_reg(apic, APIC_LVTT) &
> @@ -1502,11 +1511,7 @@ static void apic_update_lvtt(struct kvm_lapic *apic)
> if (apic->lapic_timer.timer_mode != timer_mode) {
> if (apic_lvtt_tscdeadline(apic) != (timer_mode ==
> APIC_LVT_TIMER_TSCDEADLINE)) {
> - hrtimer_cancel(&apic->lapic_timer.timer);
> - preempt_disable();
> - if (apic->lapic_timer.hv_timer_in_use)
> - cancel_hv_timer(apic);
> - preempt_enable();
> + cancel_apic_timer(apic);
> kvm_lapic_set_reg(apic, APIC_TMICT, 0);
> apic->lapic_timer.period = 0;
> apic->lapic_timer.tscdeadline = 0;
> @@ -2092,7 +2097,7 @@ int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)
> if (apic_lvtt_tscdeadline(apic))
> break;
>
> - hrtimer_cancel(&apic->lapic_timer.timer);
> + cancel_apic_timer(apic);
> kvm_lapic_set_reg(apic, APIC_TMICT, val);
> start_apic_timer(apic);
> break;
>
Queued this one, thanks.
Paolo
prev parent reply other threads:[~2021-06-08 16:27 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-07 7:19 [PATCH v2 1/3] KVM: LAPIC: Write 0 to TMICT should also cancel vmx-preemption timer Wanpeng Li
2021-06-07 7:19 ` [PATCH v2 2/3] KVM: LAPIC: Reset TMCCT during vCPU reset Wanpeng Li
2021-06-08 16:27 ` Paolo Bonzini
2021-06-09 2:15 ` Wanpeng Li
2021-06-09 5:51 ` Paolo Bonzini
2021-06-09 7:18 ` Wanpeng Li
2021-06-07 7:19 ` [PATCH v2 3/3] KVM: X86: Let's harden the ipi fastpath condition edge-trigger mode Wanpeng Li
2021-06-08 16:27 ` Paolo Bonzini
2021-06-08 16:35 ` Sean Christopherson
2021-06-08 17:40 ` Paolo Bonzini
2021-06-09 2:08 ` Wanpeng Li
2021-06-08 16:27 ` Paolo Bonzini [this message]
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