From: Alexander Graf <graf@amazon.com>
To: "Suthikulpanit, Suravee" <Suravee.Suthikulpanit@amd.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>
Cc: "pbonzini@redhat.com" <pbonzini@redhat.com>,
"rkrcmar@redhat.com" <rkrcmar@redhat.com>,
"joro@8bytes.org" <joro@8bytes.org>,
"jschoenh@amazon.de" <jschoenh@amazon.de>,
"karahmed@amazon.de" <karahmed@amazon.de>,
"rimasluk@amazon.com" <rimasluk@amazon.com>,
"Grimm, Jon" <Jon.Grimm@amd.com>
Subject: Re: [PATCH v2 14/15] kvm: ioapic: Delay update IOAPIC EOI for RTC
Date: Mon, 19 Aug 2019 13:00:07 +0200 [thread overview]
Message-ID: <e5556778-105a-bdb3-f118-84fe729d042b@amazon.com> (raw)
In-Reply-To: <1565886293-115836-15-git-send-email-suravee.suthikulpanit@amd.com>
On 15.08.19 18:25, Suthikulpanit, Suravee wrote:
> In-kernel IOAPIC does not update RTC pending EOI info with AMD SVM /w AVIC
> when interrupt is delivered as edge-triggered since AMD processors
> cannot exit on EOI for these interrupts.
>
> Add code to also check LAPIC pending EOI before injecting any new RTC
> interrupts on AMD SVM when AVIC is activated.
>
> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> ---
> arch/x86/kvm/ioapic.c | 36 ++++++++++++++++++++++++++++++++----
> 1 file changed, 32 insertions(+), 4 deletions(-)
>
> diff --git a/arch/x86/kvm/ioapic.c b/arch/x86/kvm/ioapic.c
> index 1add1bc..45e7bb0 100644
> --- a/arch/x86/kvm/ioapic.c
> +++ b/arch/x86/kvm/ioapic.c
> @@ -39,6 +39,7 @@
> #include <asm/processor.h>
> #include <asm/page.h>
> #include <asm/current.h>
> +#include <asm/virtext.h>
> #include <trace/events/kvm.h>
>
> #include "ioapic.h"
> @@ -173,6 +174,7 @@ static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
> return false;
> }
>
> +#define APIC_DEST_NOSHORT 0x0
> static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq,
> int irq_level, bool line_status)
> {
> @@ -201,10 +203,36 @@ static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq,
> * interrupts lead to time drift in Windows guests. So we track
> * EOI manually for the RTC interrupt.
> */
> - if (irq == RTC_GSI && line_status &&
> - rtc_irq_check_coalesced(ioapic)) {
> - ret = 0;
> - goto out;
> + if (irq == RTC_GSI && line_status) {
> + struct kvm *kvm = ioapic->kvm;
> + union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
> +
> + /*
> + * Since, AMD SVM AVIC accelerates write access to APIC EOI
> + * register for edge-trigger interrupts, IOAPIC will not be
> + * able to receive the EOI. In this case, we do lazy update
> + * of the pending EOI when trying to set IOAPIC irq for RTC.
> + */
> + if (cpu_has_svm(NULL) &&
> + (kvm->arch.apicv_state == APICV_ACTIVATED) &&
> + (entry->fields.trig_mode == IOAPIC_EDGE_TRIG)) {
> + int i;
> + struct kvm_vcpu *vcpu;
> +
> + kvm_for_each_vcpu(i, vcpu, kvm)
> + if (kvm_apic_match_dest(vcpu, NULL,
> + KVM_APIC_DEST_NOSHORT,
> + entry->fields.dest_id,
> + entry->fields.dest_mode)) {
> + __rtc_irq_eoi_tracking_restore_one(vcpu);
I don't understand why this works. This code just means we're injecting
an EOI on the first CPU that has the vector mapped, right when we're
setting it to trigger, no?
Alex
> + break;
> + }
> + }
> +
> + if (rtc_irq_check_coalesced(ioapic)) {
> + ret = 0;
> + goto out;
> + }
> }
>
> old_irr = ioapic->irr;
>
next prev parent reply other threads:[~2019-08-19 11:00 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-15 16:25 [PATCH v2 00/15] kvm: x86: Support AMD SVM AVIC w/ in-kernel irqchip mode Suthikulpanit, Suravee
2019-08-15 16:25 ` [PATCH v2 01/15] kvm: x86: Modify kvm_x86_ops.get_enable_apicv() to use struct kvm parameter Suthikulpanit, Suravee
2019-08-27 7:15 ` Vitaly Kuznetsov
2019-08-15 16:25 ` [PATCH v2 02/15] kvm: x86: Introduce KVM APICv state Suthikulpanit, Suravee
2019-08-19 9:49 ` Alexander Graf
2019-08-26 19:06 ` Suthikulpanit, Suravee
2019-08-15 16:25 ` [PATCH v2 03/15] kvm: Add arch-specific per-VM debugfs support Suthikulpanit, Suravee
2019-08-15 16:25 ` [PATCH v2 04/15] kvm: x86: Add per-VM APICv state debugfs Suthikulpanit, Suravee
2019-08-19 9:57 ` Alexander Graf
2019-08-26 19:41 ` Suthikulpanit, Suravee
2019-08-27 8:20 ` Alexander Graf
2019-08-28 18:39 ` Suthikulpanit, Suravee
2019-08-28 19:36 ` Graf (AWS), Alexander
2019-08-15 16:25 ` [PATCH v2 05/15] kvm: lapic: Introduce APICv update helper function Suthikulpanit, Suravee
2019-08-27 7:22 ` Vitaly Kuznetsov
2019-08-15 16:25 ` [PATCH v2 06/15] kvm: x86: Add support for activate/de-activate APICv at runtime Suthikulpanit, Suravee
2019-08-27 7:29 ` Vitaly Kuznetsov
2019-08-27 8:05 ` Alexander Graf
2019-08-15 16:25 ` [PATCH v2 07/15] kvm: x86: svm: Add support to activate/deactivate posted interrupts Suthikulpanit, Suravee
2019-08-15 16:25 ` [PATCH v2 08/15] svm: Add support for setup/destroy virutal APIC backing page for AVIC Suthikulpanit, Suravee
2019-08-15 16:25 ` [PATCH v2 09/15] svm: Add support for activate/deactivate AVIC at runtime Suthikulpanit, Suravee
2019-08-19 10:28 ` Alexander Graf
2019-08-15 16:25 ` [PATCH v2 10/15] kvm: x86: hyperv: Use APICv deactivate request interface Suthikulpanit, Suravee
2019-08-19 10:31 ` Alexander Graf
2019-08-15 16:25 ` [PATCH v2 11/15] svm: Temporary deactivate AVIC during ExtINT handling Suthikulpanit, Suravee
2019-08-19 10:35 ` Alexander Graf
2019-08-28 15:17 ` Suthikulpanit, Suravee
2019-08-28 19:37 ` Graf (AWS), Alexander
2019-09-10 15:46 ` Suthikulpanit, Suravee
2019-08-15 16:25 ` [PATCH v2 12/15] kvm: i8254: Check LAPIC EOI pending when injecting irq on SVM AVIC Suthikulpanit, Suravee
2019-08-19 10:42 ` Alexander Graf
2019-08-26 20:46 ` Suthikulpanit, Suravee
2019-08-27 9:10 ` Alexander Graf
2019-09-13 14:50 ` Suthikulpanit, Suravee
2019-08-15 16:25 ` [PATCH v2 13/15] kvm: lapic: Clean up APIC predefined macros Suthikulpanit, Suravee
2019-08-15 16:25 ` [PATCH v2 14/15] kvm: ioapic: Delay update IOAPIC EOI for RTC Suthikulpanit, Suravee
2019-08-19 11:00 ` Alexander Graf [this message]
2019-09-04 2:06 ` Suthikulpanit, Suravee
2019-08-15 16:25 ` [PATCH v2 15/15] svm: Allow AVIC with in-kernel irqchip mode Suthikulpanit, Suravee
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