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[100.0.197.103]) by smtp.gmail.com with ESMTPSA id w51sm4943466qth.18.2019.06.16.13.04.51 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Sun, 16 Jun 2019 13:04:53 -0700 (PDT) Date: Sun, 16 Jun 2019 16:04:49 -0400 From: "Michael S. Tsirkin" To: Jean-Philippe Brucker Subject: Re: [virtio-dev] Re: [PATCH v8 2/7] dt-bindings: virtio: Add virtio-pci-iommu node Message-ID: <20190616154841-mutt-send-email-mst@kernel.org> References: <20190530170929.19366-1-jean-philippe.brucker@arm.com> <20190530170929.19366-3-jean-philippe.brucker@arm.com> <20190530133523-mutt-send-email-mst@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Cc: "virtio-dev@lists.oasis-open.org" , "kevin.tian@intel.com" , Lorenzo Pieralisi , "tnowicki@caviumnetworks.com" , "frowand.list@gmail.com" , "devicetree@vger.kernel.org" , "linux-pci@vger.kernel.org" , "joro@8bytes.org" , "virtualization@lists.linux-foundation.org" , "iommu@lists.linux-foundation.org" , "robh+dt@kernel.org" , "kvmarm@lists.cs.columbia.edu" , "bhelgaas@google.com" , Robin Murphy , "jasowang@redhat.com" , "bauerman@linux.ibm.com" X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Fri, May 31, 2019 at 12:13:47PM +0100, Jean-Philippe Brucker wrote: > On 30/05/2019 18:45, Michael S. Tsirkin wrote: > > On Thu, May 30, 2019 at 06:09:24PM +0100, Jean-Philippe Brucker wrote: > >> Some systems implement virtio-iommu as a PCI endpoint. The operating > >> system needs to discover the relationship between IOMMU and masters long > >> before the PCI endpoint gets probed. Add a PCI child node to describe the > >> virtio-iommu device. > >> > >> The virtio-pci-iommu is conceptually split between a PCI programming > >> interface and a translation component on the parent bus. The latter > >> doesn't have a node in the device tree. The virtio-pci-iommu node > >> describes both, by linking the PCI endpoint to "iommus" property of DMA > >> master nodes and to "iommu-map" properties of bus nodes. > >> > >> Reviewed-by: Rob Herring > >> Reviewed-by: Eric Auger > >> Signed-off-by: Jean-Philippe Brucker > > > > So this is just an example right? > > We are not defining any new properties or anything like that. > > Yes it's just an example. The properties already exist but it's good to > describe how to put them together for this particular case, because > there isn't a precedent describing the topology for an IOMMU that > appears on the PCI bus. > > > I think down the road for non dt platforms we want to put this > > info in the config space of the device. I do not think ACPI > > is the best option for this since not all systems have it. > > But that can wait. > > There is the probe order problem - PCI needs this info before starting > to probe devices on the bus. This isn't all that special - it's pretty common for IOMMUs to be pci devices. The solution is to have the device on bus 0. For example, add it with DECLARE_PCI_FIXUP_EARLY or DECLARE_PCI_FIXUP_CLASS_EARLY in e.g. arch/x86/kernel/quirks.c or drivers/pci/quirks.c You can also use the configuration access capability if there's need to access the device before its memory is enabled. > Maybe we could store the info in a separate > memory region, that is referenced on the command-line and that the guest > can read early. > > Thanks, > Jean The point is to avoid command line hacks. Devices should be self describing. -- MST _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm