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From: Andre Przywara <andre.przywara@arm.com>
To: Marc Zyngier <maz@kernel.org>
Cc: kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org
Subject: Re: [PATCH 2/5] KVM: arm64: Refactor filtering of ID registers
Date: Thu, 20 Feb 2020 14:12:44 +0000	[thread overview]
Message-ID: <20200220141244.353ec1d7@donnerap.cambridge.arm.com> (raw)
In-Reply-To: <20200216185324.32596-3-maz@kernel.org>

On Sun, 16 Feb 2020 18:53:21 +0000
Marc Zyngier <maz@kernel.org> wrote:

Hi,

> Our current ID register filtering is starting to be a mess of if()
> statements, and isn't going to get any saner.
> 
> Let's turn it into a switch(), which has a chance of being more
> readable.

Indeed, much better now.

> Signed-off-by: Marc Zyngier <maz@kernel.org>

Reviewed-by: Andre Przywara <andre.przywara@arm.com>

Thanks,
Andre

> ---
>  arch/arm64/kvm/sys_regs.c | 22 +++++++++++++++-------
>  1 file changed, 15 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index da82c4b03aab..682fedd7700f 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -9,6 +9,7 @@
>   *          Christoffer Dall <c.dall@virtualopensystems.com>
>   */
>  
> +#include <linux/bitfield.h>
>  #include <linux/bsearch.h>
>  #include <linux/kvm_host.h>
>  #include <linux/mm.h>
> @@ -1070,6 +1071,8 @@ static bool access_arch_timer(struct kvm_vcpu *vcpu,
>  	return true;
>  }
>  
> +#define FEATURE(x)	(GENMASK_ULL(x##_SHIFT + 3, x##_SHIFT))
> +
>  /* Read a sanitised cpufeature ID register by sys_reg_desc */
>  static u64 read_id_reg(const struct kvm_vcpu *vcpu,
>  		struct sys_reg_desc const *r, bool raz)
> @@ -1078,13 +1081,18 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu,
>  			 (u32)r->CRn, (u32)r->CRm, (u32)r->Op2);
>  	u64 val = raz ? 0 : read_sanitised_ftr_reg(id);
>  
> -	if (id == SYS_ID_AA64PFR0_EL1 && !vcpu_has_sve(vcpu)) {
> -		val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT);
> -	} else if (id == SYS_ID_AA64ISAR1_EL1 && !vcpu_has_ptrauth(vcpu)) {
> -		val &= ~((0xfUL << ID_AA64ISAR1_APA_SHIFT) |
> -			 (0xfUL << ID_AA64ISAR1_API_SHIFT) |
> -			 (0xfUL << ID_AA64ISAR1_GPA_SHIFT) |
> -			 (0xfUL << ID_AA64ISAR1_GPI_SHIFT));
> +	switch (id) {
> +	case SYS_ID_AA64PFR0_EL1:
> +		if (!vcpu_has_sve(vcpu))
> +			val &= ~FEATURE(ID_AA64PFR0_SVE);
> +		break;
> +	case SYS_ID_AA64ISAR1_EL1:
> +		if (!vcpu_has_ptrauth(vcpu))
> +			val &= ~(FEATURE(ID_AA64ISAR1_APA) |
> +				 FEATURE(ID_AA64ISAR1_API) |
> +				 FEATURE(ID_AA64ISAR1_GPA) |
> +				 FEATURE(ID_AA64ISAR1_GPI));
> +		break;
>  	}
>  
>  	return val;

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  reply	other threads:[~2020-02-20 14:12 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-16 18:53 [PATCH 0/5] Random debug/PMU fixes for 5.6 Marc Zyngier
2020-02-16 18:53 ` [PATCH 1/5] KVM: arm64: Fix missing RES1 in emulation of DBGBIDR Marc Zyngier
2020-02-18 17:43   ` James Morse
2020-02-18 18:01     ` Robin Murphy
2020-02-18 18:15       ` James Morse
2020-02-16 18:53 ` [PATCH 2/5] KVM: arm64: Refactor filtering of ID registers Marc Zyngier
2020-02-20 14:12   ` Andre Przywara [this message]
2020-02-16 18:53 ` [PATCH 3/5] kvm: arm64: Limit PMU version to ARMv8.1 Marc Zyngier
2020-02-18 17:43   ` James Morse
2020-02-19  9:46     ` Marc Zyngier
2020-02-19 10:18       ` James Morse
2020-02-19 11:14         ` Marc Zyngier
2020-02-16 18:53 ` [PATCH 4/5] KVM: arm64: Limit the debug architecture to ARMv8.0 Marc Zyngier
2020-02-18 17:45   ` James Morse
2020-02-16 18:53 ` [PATCH 5/5] KVM: arm64: Upgrade PMU support to ARMv8.4 Marc Zyngier

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