From: Rob Herring <robh@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <maz@kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
Will Deacon <will@kernel.org>,
kvmarm@lists.cs.columbia.edu
Subject: Re: [PATCH v7 2/2] arm64: Add workaround for Arm Cortex-A77 erratum 1508412
Date: Thu, 29 Oct 2020 07:44:47 -0500 [thread overview]
Message-ID: <CAL_Jsq+wC-cu6xAGEAxH7JwcuBXb207BH7vrQzkLG=gpgUdZMw@mail.gmail.com> (raw)
In-Reply-To: <20201029100450.GA10776@gaia>
On Thu, Oct 29, 2020 at 5:04 AM Catalin Marinas <catalin.marinas@arm.com> wrote:
>
> On Wed, Oct 28, 2020 at 01:28:39PM -0500, Rob Herring wrote:
> > On Cortex-A77 r0p0 and r1p0, a sequence of a non-cacheable or device load
> > and a store exclusive or PAR_EL1 read can cause a deadlock.
> >
> > The workaround requires a DMB SY before and after a PAR_EL1 register
> > read. In addition, it's possible an interrupt (doing a device read) or
> > KVM guest exit could be taken between the DMB and PAR read, so we
> > also need a DMB before returning from interrupt and before returning to
> > a guest.
> >
> > A deadlock is still possible with the workaround as KVM guests must also
> > have the workaround. IOW, a malicious guest can deadlock an affected
> > systems.
> >
> > This workaround also depends on a firmware counterpart to enable the h/w
> > to insert DMB SY after load and store exclusive instructions. See the
> > errata document SDEN-1152370 v10 [1] for more information.
> >
> > [1] https://static.docs.arm.com/101992/0010/Arm_Cortex_A77_MP074_Software_Developer_Errata_Notice_v10.pdf
> >
> > Cc: Catalin Marinas <catalin.marinas@arm.com>
> > Cc: James Morse <james.morse@arm.com>
> > Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
> > Cc: Will Deacon <will@kernel.org>
> > Cc: Julien Thierry <julien.thierry.kdev@gmail.com>
> > Cc: kvmarm@lists.cs.columbia.edu
> > Acked-by: Marc Zyngier <maz@kernel.org>
> > Signed-off-by: Rob Herring <robh@kernel.org>
>
> I thought I reviewed the v6 already and that's just a rebase. Here it is
> again:
>
> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
You did. Sorry, I forgot to add it.
Rob
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next prev parent reply other threads:[~2020-10-29 12:45 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-28 18:28 [PATCH v7 1/2] arm64: Add part number for Arm Cortex-A77 Rob Herring
2020-10-28 18:28 ` [PATCH v7 2/2] arm64: Add workaround for Arm Cortex-A77 erratum 1508412 Rob Herring
2020-10-29 10:04 ` Catalin Marinas
2020-10-29 12:44 ` Rob Herring [this message]
2020-10-29 10:05 ` [PATCH v7 1/2] arm64: Add part number for Arm Cortex-A77 Catalin Marinas
2020-10-29 15:27 ` Will Deacon
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