From: Jerome Brunet <jbrunet@baylibre.com>
To: Neil Armstrong <narmstrong@baylibre.com>,
Kevin Hilman <khilman@baylibre.com>,
Carlo Caione <carlo@caione.org>
Cc: linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
Jerome Brunet <jbrunet@baylibre.com>
Subject: [PATCH 2/5] clk: meson: clean-up clock registration
Date: Tue, 4 Dec 2018 17:53:07 +0100 [thread overview]
Message-ID: <20181204165310.20806-3-jbrunet@baylibre.com> (raw)
In-Reply-To: <20181204165310.20806-1-jbrunet@baylibre.com>
Order, ids and size between the table of regmap clocks and the onecell
data table could be different.
Set regmap pointer in all the regmap clocks before starting the
registration using the onecell data, to make sure we don't
get into an incoherent situation.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
drivers/clk/meson/meson-aoclk.c | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/clk/meson/meson-aoclk.c b/drivers/clk/meson/meson-aoclk.c
index f965845917e3..258c8d259ea1 100644
--- a/drivers/clk/meson/meson-aoclk.c
+++ b/drivers/clk/meson/meson-aoclk.c
@@ -65,15 +65,20 @@ int meson_aoclkc_probe(struct platform_device *pdev)
return ret;
}
- /*
- * Populate regmap and register all clks
- */
- for (clkid = 0; clkid < data->num_clks; clkid++) {
+ /* Populate regmap */
+ for (clkid = 0; clkid < data->num_clks; clkid++)
data->clks[clkid]->map = regmap;
+ /* Register all clks */
+ for (clkid = 0; clkid < data->hw_data->num; clkid++) {
+ if (!data->hw_data->hws[clkid])
+ continue;
+
ret = devm_clk_hw_register(dev, data->hw_data->hws[clkid]);
- if (ret)
+ if (ret) {
+ dev_err(dev, "Clock registration failed\n");
return ret;
+ }
}
return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
--
2.19.1
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next prev parent reply other threads:[~2018-12-04 16:53 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-04 16:53 [PATCH 0/5] clk: meson: axg: add 32k clock generation Jerome Brunet
2018-12-04 16:53 ` [PATCH 1/5] dt-bindings: clk: meson: add ao slow clock path ids Jerome Brunet
2018-12-19 18:55 ` Rob Herring
2018-12-04 16:53 ` Jerome Brunet [this message]
2018-12-04 16:53 ` [PATCH 3/5] clk: meson: add dual divider clock driver Jerome Brunet
2018-12-04 16:53 ` [PATCH 4/5] clk: meson: gxbb-ao: replace cec-32k with the dual divider Jerome Brunet
2018-12-04 16:53 ` [PATCH 5/5] clk: meson: axg-ao: add 32k generation subtree Jerome Brunet
2018-12-05 9:50 ` [PATCH 0/5] clk: meson: axg: add 32k clock generation Neil Armstrong
2018-12-05 9:51 ` Neil Armstrong
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