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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: Jerome Brunet <jbrunet@baylibre.com>
Cc: Kevin Hilman <khilman@baylibre.com>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-amlogic@lists.infradead.org
Subject: Re: [PATCH 5/7] mmc: meson-gx: avoid clock glitch when switching to DDR modes
Date: Thu, 18 Apr 2019 22:53:53 +0200	[thread overview]
Message-ID: <CAFBinCBQPSsqwDSd6nQMLqOuApiESwHXn4wQbOp49WLpXfBk=Q@mail.gmail.com> (raw)
In-Reply-To: <8316d7875bf0479e91cc11ce5fbf3b2e21f92a2c.camel@baylibre.com>

Hi Jerome,

On Thu, Apr 18, 2019 at 10:46 PM Jerome Brunet <jbrunet@baylibre.com> wrote:
>
> On Thu, 2019-04-18 at 22:16 +0200, Martin Blumenstingl wrote:
> > Hi Jerome,
> >
> > On Wed, Apr 17, 2019 at 10:44 PM Jerome Brunet <jbrunet@baylibre.com> wrote:
> > > Activating DDR in the Amlogic mmc controller, among other things, will
> > > divide the output clock by 2. So by activating it with clock on, we are
> > > creating a glitch on the output.
> > >
> > > Instead, let's deal with DDR when the clock output is off, when setting
> > > the clock.
> > >
> > > Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> > it seems that this patch breaks SD card on my Khadas VIM and Khadas VIM2.
>
> The error I see in your logs is with eMMC and hs200, not SD card.
sorry, I should have been more clear that there are two errors:
eMMC, this is what I have been seeing for a while on my Khadas VIM2
(it's probably not related to this patch):
  mmc1: mmc_select_hs200 failed, error -84
  mmc1: error -84 whilst initialising MMC card

however, then there's this other error:
  print_req_error: I/O error, dev mmcblk0, sector 0 flags 0
  Buffer I/O error on dev mmcblk0, logical block 0, async page read
as result of this the partition table cannot be read and my kernel
cannot find the rootfs.

> Either way, There is something I don't really get. eMMC should not go through
> any DDR mode to reach HS200 (which is an SDR mode), neither should SD to reach
> HS.
>
> All this does is flipping the DDR bit (when necessary) when clock if off for
> the mmc device, avoiding a glitch on clk line.
>
> This patch should not make any difference for SDR only setup, Maybe I missed
> something, but I don't see how it could make anything different for SDR only.
>
> I (repeatedly) tested both vim1 and vim2, without seeing this issue, so I can't
> debug this. I'll need more detail to progress, something does not make sense here.
please let me know from which part of the driver do you want debug logs


Regards
Martin

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  reply	other threads:[~2019-04-18 20:54 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-17 20:43 [PATCH 0/7] mmc: meson-gx: clean up and tuning update Jerome Brunet
2019-04-17 20:43 ` [PATCH 1/7] mmc: meson-gx: remove open coded read with timeout Jerome Brunet
2019-04-18 20:18   ` Martin Blumenstingl
2019-04-17 20:43 ` [PATCH 2/7] mmc: meson-gx: ack only raised irq Jerome Brunet
2019-04-17 20:43 ` [PATCH 3/7] mmc: meson-gx: irq is not shared Jerome Brunet
2019-04-18 19:52   ` Martin Blumenstingl
2019-04-17 20:43 ` [PATCH 4/7] mmc: meson-gx: disable HS400 Jerome Brunet
2019-04-17 20:43 ` [PATCH 5/7] mmc: meson-gx: avoid clock glitch when switching to DDR modes Jerome Brunet
2019-04-18 20:16   ` Martin Blumenstingl
2019-04-18 20:46     ` Jerome Brunet
2019-04-18 20:53       ` Martin Blumenstingl [this message]
2019-04-18 21:15         ` Jerome Brunet
2019-04-19  8:53           ` Jerome Brunet
2019-04-20  9:23             ` Martin Blumenstingl
2019-04-17 20:43 ` [PATCH 6/7] mmc: meson-gx: remove Rx phase tuning Jerome Brunet
2019-04-17 20:43 ` [PATCH 7/7] mmc: meson-gx: add signal resampling tuning Jerome Brunet

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