From: Qais Yousef <qais.yousef@arm.com>
To: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
"Peter Zijlstra (Intel)" <peterz@infradead.org>
Cc: Morten Rasmussen <morten.rasmussen@arm.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Linus Torvalds <torvalds@linux-foundation.org>,
linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org,
Qais Yousef <qais.yousef@arm.com>
Subject: [RFC PATCH 1/3] arm64: kvm: Handle Asymmetric AArch32 systems
Date: Thu, 8 Oct 2020 19:16:39 +0100 [thread overview]
Message-ID: <20201008181641.32767-2-qais.yousef@arm.com> (raw)
In-Reply-To: <20201008181641.32767-1-qais.yousef@arm.com>
On a system without uniform support for AArch32 at EL0, it is possible
for the guest to force run AArch32 at EL0 and potentially cause an
illegal exception if running on the wrong core.
Add an extra check to catch if the guest ever does that and prevent it
from running again, treating it as ARM_EXCEPTION_IL.
We try to catch this misbehavior as early as possible and not rely on
PSTATE.IL to occur.
Tested on Juno by instrumenting the host to:
* Fake asym aarch32.
* Comment out hiding of ID registers from the guest.
Any attempt to run 32bit app in the guest will produce such error on
qemu:
# ./test
error: kvm run failed Invalid argument
R00=ffff0fff R01=ffffffff R02=00000000 R03=00087968
R04=000874b8 R05=ffd70b24 R06=ffd70b2c R07=00000055
R08=00000000 R09=00000000 R10=00000000 R11=00000000
R12=0000001c R13=ffd6f974 R14=0001ff64 R15=ffff0fe0
PSR=a0000010 N-C- A usr32
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
---
arch/arm64/kvm/arm.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
index b588c3b5c2f0..22ff3373d855 100644
--- a/arch/arm64/kvm/arm.c
+++ b/arch/arm64/kvm/arm.c
@@ -644,6 +644,11 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
struct kvm_run *run = vcpu->run;
int ret;
+ if (!system_supports_32bit_el0() && vcpu_mode_is_32bit(vcpu)) {
+ kvm_err("Illegal AArch32 mode at EL0, can't run.");
+ return -ENOEXEC;
+ }
+
if (unlikely(!kvm_vcpu_initialized(vcpu)))
return -ENOEXEC;
@@ -804,6 +809,17 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
preempt_enable();
+ /*
+ * For asym aarch32 systems we present a 64bit only system to
+ * the guest. But in case it managed somehow to escape that and
+ * enter 32bit mode, catch that and prevent it from running
+ * again.
+ */
+ if (!system_supports_32bit_el0() && vcpu_mode_is_32bit(vcpu)) {
+ kvm_err("Detected illegal AArch32 mode at EL0, exiting.");
+ ret = ARM_EXCEPTION_IL;
+ }
+
ret = handle_exit(vcpu, ret);
}
--
2.17.1
next prev parent reply other threads:[~2020-10-08 18:16 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-08 18:16 [RFC PATCH 0/3] Add support for Asymmetric AArch32 systems Qais Yousef
2020-10-08 18:16 ` Qais Yousef [this message]
2020-10-09 8:12 ` [RFC PATCH 1/3] arm64: kvm: Handle " Marc Zyngier
2020-10-09 9:58 ` Qais Yousef
2020-10-09 12:34 ` Marc Zyngier
2020-10-09 12:48 ` Qais Yousef
2020-10-12 15:32 ` James Morse
2020-10-13 10:32 ` Marc Zyngier
2020-10-13 11:51 ` James Morse
2020-10-13 11:59 ` Qais Yousef
2020-10-13 12:09 ` Marc Zyngier
2020-10-13 12:16 ` Qais Yousef
2020-10-08 18:16 ` [RFC PATCH 2/3] arm64: Add support for asymmetric AArch32 EL0 configurations Qais Yousef
2020-10-08 18:22 ` Randy Dunlap
2020-10-12 10:22 ` Qais Yousef
2020-10-09 6:13 ` Greg Kroah-Hartman
2020-10-09 8:40 ` Will Deacon
2020-10-09 8:50 ` Catalin Marinas
2020-10-09 9:39 ` Catalin Marinas
2020-10-12 12:46 ` Qais Yousef
2020-10-08 18:16 ` [RFC PATCH 3/3] arm64: Handle AArch32 tasks running on non AArch32 cpu Qais Yousef
2020-10-09 7:29 ` Peter Zijlstra
2020-10-09 8:13 ` Morten Rasmussen
2020-10-09 8:31 ` Will Deacon
2020-10-09 8:50 ` Morten Rasmussen
2020-10-09 9:33 ` Catalin Marinas
2020-10-09 9:42 ` Greg Kroah-Hartman
2020-10-09 11:31 ` Qais Yousef
2020-10-09 12:40 ` Catalin Marinas
2020-10-13 14:23 ` Qais Yousef
2020-10-09 9:25 ` Peter Zijlstra
2020-10-09 9:39 ` Qais Yousef
2020-10-09 9:51 ` Catalin Marinas
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