From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18139C433E2 for ; Wed, 24 Mar 2021 19:00:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B80EA61A29 for ; Wed, 24 Mar 2021 19:00:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237203AbhCXTAA (ORCPT ); Wed, 24 Mar 2021 15:00:00 -0400 Received: from foss.arm.com ([217.140.110.172]:38094 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237571AbhCXS7d (ORCPT ); Wed, 24 Mar 2021 14:59:33 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D21331474; Wed, 24 Mar 2021 11:59:32 -0700 (PDT) Received: from C02TD0UTHF1T.local (unknown [10.57.22.143]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 763F93F718; Wed, 24 Mar 2021 11:59:27 -0700 (PDT) Date: Wed, 24 Mar 2021 18:59:21 +0000 From: Mark Rutland To: Will Deacon Cc: Hector Martin , linux-arm-kernel@lists.infradead.org, Marc Zyngier , Rob Herring , Arnd Bergmann , Olof Johansson , Krzysztof Kozlowski , Mark Kettenis , Tony Lindgren , Mohamed Mediouni , Stan Skowronek , Alexander Graf , Linus Walleij , Andy Shevchenko , Greg Kroah-Hartman , Jonathan Corbet , Catalin Marinas , Christoph Hellwig , "David S. Miller" , devicetree@vger.kernel.org, linux-serial@vger.kernel.org, linux-doc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [RFT PATCH v3 13/27] arm64: Add Apple vendor-specific system registers Message-ID: <20210324185921.GA27297@C02TD0UTHF1T.local> References: <20210304213902.83903-1-marcan@marcan.st> <20210304213902.83903-14-marcan@marcan.st> <20210324183818.GF13181@willie-the-truck> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210324183818.GF13181@willie-the-truck> Precedence: bulk List-ID: X-Mailing-List: linux-arch@vger.kernel.org On Wed, Mar 24, 2021 at 06:38:18PM +0000, Will Deacon wrote: > On Fri, Mar 05, 2021 at 06:38:48AM +0900, Hector Martin wrote: > > Apple ARM64 SoCs have a ton of vendor-specific registers we're going to > > have to deal with, and those don't really belong in sysreg.h with all > > the architectural registers. Make a new home for them, and add some > > registers which are useful for early bring-up. > > > > Signed-off-by: Hector Martin > > --- > > MAINTAINERS | 1 + > > arch/arm64/include/asm/sysreg_apple.h | 69 +++++++++++++++++++++++++++ > > 2 files changed, 70 insertions(+) > > create mode 100644 arch/arm64/include/asm/sysreg_apple.h > > > > diff --git a/MAINTAINERS b/MAINTAINERS > > index aec14fbd61b8..3a352c687d4b 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -1646,6 +1646,7 @@ B: https://github.com/AsahiLinux/linux/issues > > C: irc://chat.freenode.net/asahi-dev > > T: git https://github.com/AsahiLinux/linux.git > > F: Documentation/devicetree/bindings/arm/apple.yaml > > +F: arch/arm64/include/asm/sysreg_apple.h > > (this isn't needed with my suggestion below). > > > ARM/ARTPEC MACHINE SUPPORT > > M: Jesper Nilsson > > diff --git a/arch/arm64/include/asm/sysreg_apple.h b/arch/arm64/include/asm/sysreg_apple.h > > new file mode 100644 > > index 000000000000..48347a51d564 > > --- /dev/null > > +++ b/arch/arm64/include/asm/sysreg_apple.h > > I doubt apple are the only folks doing this, so can we instead have > sysreg-impdef.h please, and then have an Apple section in there for these > registers? That way, we could also have an imp_sys_reg() macro to limit > CRn to 11 or 15, which is the reserved encoding space for these registers. > > We'll cc you for any patches touching the Apple parts, as we don't have > the first clue about what's hiding in there. For existing IMP-DEF sysregs (e.g. the Kryo L2 control registers), we've put the definitions in the drivers, rather than collating non-architectural bits under arch/arm64/. So far we've kept arch/arm64/ largely devoid of IMP-DEF bits, and it seems a shame to add something with the sole purpose of collating that, especially given arch code shouldn't need to touch these if FW and bootloader have done their jobs right. Can we put the definitions in the relevant drivers? That would sidestep any pain with MAINTAINERS, too. Thanks, Mark.