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From: CK Hu <ck.hu@mediatek.com>
To: <yongqiang.niu@mediatek.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org,
	Philipp Zabel <p.zabel@pengutronix.de>,
	David Airlie <airlied@linux.ie>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Rob Herring <robh+dt@kernel.org>,
	linux-mediatek@lists.infradead.org,
	Daniel Vetter <daniel@ffwll.ch>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3, 20/27] drm/mediatek: add background color input select function for ovl/ovl_2l
Date: Fri, 14 Jun 2019 13:06:35 +0800	[thread overview]
Message-ID: <1560488795.16718.18.camel@mtksdaap41> (raw)
In-Reply-To: <1559734986-7379-21-git-send-email-yongqiang.niu@mediatek.com>

Hi, Yongqiang:

On Wed, 2019-06-05 at 19:42 +0800, yongqiang.niu@mediatek.com wrote:
> From: Yongqiang Niu <yongqiang.niu@mediatek.com>
> 
> This patch add background color input select function for ovl/ovl_2l
> 
> ovl include 4 DRAM layer and 1 background color layer
> ovl_2l include 4 DRAM layer and 1 background color layer
> DRAM layer frame buffer data from render hardware, GPU for example.
> backgournd color layer is embed in ovl/ovl_2l, we can only set
> it color, but not support DRAM frame buffer.
> 
> for ovl0->ovl0_2l direct link usecase,
> we need set ovl0_2l background color intput select from ovl0
> if render send DRAM buffer layer number <=4, all these layer read
> by ovl.
> layer0 is at the bottom of all layers.
> layer3 is at the top of all layers.
> if render send DRAM buffer layer numbfer >=4 && <=6
> ovl0 read layer0~3
> ovl0_2l read layer4~5
> layer5 is at the top ot all these layers.
> 
> the decision of how to setting ovl0/ovl0_2l read these layer data
> is controlled in mtk crtc, which will be another patch
> 
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 23 +++++++++++++++++++++++
>  1 file changed, 23 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index a0ab760..b5a9907 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -27,6 +27,8 @@
>  #define DISP_REG_OVL_EN				0x000c
>  #define DISP_REG_OVL_RST			0x0014
>  #define DISP_REG_OVL_ROI_SIZE			0x0020
> +#define DISP_REG_OVL_DATAPATH_CON		0x0024
> +#define OVL_BGCLR_SEL_IN				BIT(2)
>  #define DISP_REG_OVL_ROI_BGCLR			0x0028
>  #define DISP_REG_OVL_SRC_CON			0x002c
>  #define DISP_REG_OVL_CON(n)			(0x0030 + 0x20 * (n))
> @@ -245,6 +247,25 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx,
>  		mtk_ovl_layer_on(comp, idx);
>  }
>  
> +static void mtk_ovl_bgclr_in_on(struct mtk_ddp_comp *comp,
> +				enum mtk_ddp_comp_id prev)

prev is useless, so remove it.

Regards,
CK

> +{
> +	unsigned int reg;
> +
> +	reg = readl(comp->regs + DISP_REG_OVL_DATAPATH_CON);
> +	reg = reg | OVL_BGCLR_SEL_IN;
> +	writel(reg, comp->regs + DISP_REG_OVL_DATAPATH_CON);
> +}
> +
> +static void mtk_ovl_bgclr_in_off(struct mtk_ddp_comp *comp)
> +{
> +	unsigned int reg;
> +
> +	reg = readl(comp->regs + DISP_REG_OVL_DATAPATH_CON);
> +	reg = reg & ~OVL_BGCLR_SEL_IN;
> +	writel(reg, comp->regs + DISP_REG_OVL_DATAPATH_CON);
> +}
> +
>  static const struct mtk_ddp_comp_funcs mtk_disp_ovl_funcs = {
>  	.config = mtk_ovl_config,
>  	.start = mtk_ovl_start,
> @@ -255,6 +276,8 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx,
>  	.layer_on = mtk_ovl_layer_on,
>  	.layer_off = mtk_ovl_layer_off,
>  	.layer_config = mtk_ovl_layer_config,
> +	.bgclr_in_on = mtk_ovl_bgclr_in_on,
> +	.bgclr_in_off = mtk_ovl_bgclr_in_off,
>  };
>  
>  static int mtk_disp_ovl_bind(struct device *dev, struct device *master,



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  reply	other threads:[~2019-06-14  5:07 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-05 11:42 [PATCH v3, 00/27] add drm support for MT8183 yongqiang.niu
2019-06-05 11:42 ` [PATCH v3, 01/27] dt-bindings: mediatek: add binding for mt8183 display yongqiang.niu
2019-06-06  3:47   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 02/27] dt-bindings: mediatek: add ovl_2l description " yongqiang.niu
2019-07-09  1:37   ` Rob Herring
2019-06-05 11:42 ` [PATCH v3, 03/27] dt-bindings: mediatek: add ccorr " yongqiang.niu
2019-07-09  1:37   ` Rob Herring
2019-06-05 11:42 ` [PATCH v3, 04/27] dt-bindings: mediatek: add dither " yongqiang.niu
2019-07-09  1:37   ` Rob Herring
2019-06-05 11:42 ` [PATCH v3, 05/27] arm64: dts: add display nodes for mt8183 yongqiang.niu
2019-06-05 11:42 ` [PATCH v3, 06/27] drm/mediatek: add mutex mod into ddp private data yongqiang.niu
2019-06-06  5:42   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 07/27] drm/mediatek: add mutex mod register offset " yongqiang.niu
2019-06-05 11:42 ` [PATCH v3, 08/27] drm/mediatek: add mutex sof " yongqiang.niu
2019-06-06  6:12   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 09/27] drm/mediatek: add mutex sof register offset " yongqiang.niu
2019-06-13  7:45   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 10/27] drm/mediatek: split DISP_REG_CONFIG_DSI_SEL setting into another use case yongqiang.niu
2019-06-14  2:26   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 11/27] drm/mediatek: add mmsys private data for ddp path config yongqiang.niu
2019-06-14  3:28   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 12/27] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel yongqiang.niu
2019-06-05 11:42 ` [PATCH v3, 13/27] drm/mediatek: add ddp component CCORR yongqiang.niu
2019-06-14  3:42   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 14/27] drm/mediatek: add commponent OVL_2L0 yongqiang.niu
2019-06-14  3:54   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 15/27] drm/mediatek: add component OVL_2L1 yongqiang.niu
2019-06-14  3:55   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 16/27] drm/mediatek: add component DITHER yongqiang.niu
2019-06-14  4:36   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 17/27] drm/mediatek: add gmc_bits for ovl private data yongqiang.niu
2019-06-14  4:59   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 18/27] drm/medaitek: add layer_nr " yongqiang.niu
2019-06-14  5:02   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 19/27] drm/mediatek: add function to background color input select for ovl/ovl_2l direct link yongqiang.niu
2019-06-17  2:01   ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 20/27] drm/mediatek: add background color input select function for ovl/ovl_2l yongqiang.niu
2019-06-14  5:06   ` CK Hu [this message]
2019-06-05 11:43 ` [PATCH v3, 21/27] drm/mediatek: add ovl0/ovl_2l0 usecase yongqiang.niu
2019-06-05 11:43 ` [PATCH v3, 22/27] drm/mediatek: distinguish ovl and ovl_2l by layer_nr yongqiang.niu
2019-06-05 11:43 ` [PATCH v3, 23/27] drm/mediatek: add connection from ovl0 to ovl_2l0 yongqiang.niu
2019-06-05 11:43 ` [PATCH v3, 24/27] drm/mediatek: add connection from RDMA0 to COLOR0 yongqiang.niu
2019-06-05 11:43 ` [PATCH v3, 25/27] drm/mediatek: add connection from RDMA1 to DSI0 yongqiang.niu
2019-06-05 11:43 ` [PATCH v3, 26/27] drm/mediatek: add clock property check before get it yongqiang.niu
2019-06-17  3:06   ` CK Hu
2019-06-05 11:43 ` [PATCH v3, 27/27] drm/mediatek: add support for mediatek SOC MT8183 yongqiang.niu
2019-06-17  3:30   ` CK Hu

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