From: Sumit Garg <sumit.garg@linaro.org>
To: maz@kernel.org, catalin.marinas@arm.com, will@kernel.org
Cc: mark.rutland@arm.com, Sumit Garg <sumit.garg@linaro.org>,
daniel.thompson@linaro.org, jason@lakedaemon.net,
kgdb-bugreport@lists.sourceforge.net, ito-yuichi@fujitsu.com,
dianders@chromium.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, jason.wessel@windriver.com,
tglx@linutronix.de, msys.mizuma@gmail.com,
julien.thierry.kdev@gmail.com
Subject: [PATCH v5 2/5] irqchip/gic-v3: Enable support for SGIs to act as NMIs
Date: Wed, 14 Oct 2020 16:42:08 +0530 [thread overview]
Message-ID: <1602673931-28782-3-git-send-email-sumit.garg@linaro.org> (raw)
In-Reply-To: <1602673931-28782-1-git-send-email-sumit.garg@linaro.org>
Add support to handle SGIs as regular NMIs. As SGIs or IPIs defaults to a
special flow handler: handle_percpu_devid_fasteoi_ipi(), so skip NMI
handler update in case of SGIs.
Also, enable NMI support prior to gic_smp_init() as allocation of SGIs
as IRQs/NMIs happen as part of this routine.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
---
drivers/irqchip/irq-gic-v3.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 16fecc0..5efc865 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -477,6 +477,11 @@ static int gic_irq_nmi_setup(struct irq_data *d)
if (WARN_ON(gic_irq(d) >= 8192))
return -EINVAL;
+ if (get_intid_range(d) == SGI_RANGE) {
+ gic_irq_set_prio(d, GICD_INT_NMI_PRI);
+ return 0;
+ }
+
/* desc lock should already be held */
if (gic_irq_in_rdist(d)) {
u32 idx = gic_get_ppi_index(d);
@@ -514,6 +519,11 @@ static void gic_irq_nmi_teardown(struct irq_data *d)
if (WARN_ON(gic_irq(d) >= 8192))
return;
+ if (get_intid_range(d) == SGI_RANGE) {
+ gic_irq_set_prio(d, GICD_INT_DEF_PRI);
+ return;
+ }
+
/* desc lock should already be held */
if (gic_irq_in_rdist(d)) {
u32 idx = gic_get_ppi_index(d);
@@ -1708,6 +1718,7 @@ static int __init gic_init_bases(void __iomem *dist_base,
gic_dist_init();
gic_cpu_init();
+ gic_enable_nmi_support();
gic_smp_init();
gic_cpu_pm_init();
@@ -1719,8 +1730,6 @@ static int __init gic_init_bases(void __iomem *dist_base,
gicv2m_init(handle, gic_data.domain);
}
- gic_enable_nmi_support();
-
return 0;
out_free:
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-10-14 11:14 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-14 11:12 [PATCH v5 0/5] arm64: Add framework to turn an IPI as NMI Sumit Garg
2020-10-14 11:12 ` [PATCH v5 1/5] arm64: Add framework to turn " Sumit Garg
2020-10-15 1:15 ` Masayoshi Mizuma
2020-10-19 11:37 ` Marc Zyngier
2020-10-20 6:43 ` Sumit Garg
2020-10-20 10:08 ` Marc Zyngier
2020-10-20 11:22 ` Sumit Garg
2020-10-20 12:25 ` Daniel Thompson
2020-10-20 12:32 ` Marc Zyngier
2020-10-21 5:22 ` Sumit Garg
2020-10-21 10:27 ` Marc Zyngier
2020-10-22 11:52 ` Sumit Garg
2020-10-19 11:56 ` Marc Zyngier
2020-10-20 7:07 ` Sumit Garg
2020-10-14 11:12 ` Sumit Garg [this message]
2020-10-15 1:16 ` [PATCH v5 2/5] irqchip/gic-v3: Enable support for SGIs to act as NMIs Masayoshi Mizuma
2020-10-19 12:07 ` Marc Zyngier
2020-10-20 7:24 ` Sumit Garg
2020-10-14 11:12 ` [PATCH v5 3/5] arm64: smp: Allocate and setup IPI as NMI Sumit Garg
2020-10-15 1:16 ` Masayoshi Mizuma
2020-10-19 11:59 ` Marc Zyngier
2020-10-20 7:16 ` Sumit Garg
2020-10-14 11:12 ` [PATCH v5 4/5] arm64: kgdb: Round up cpus using " Sumit Garg
2020-10-19 12:15 ` Marc Zyngier
2020-10-20 8:51 ` Sumit Garg
2020-10-14 11:12 ` [PATCH v5 5/5] arm64: ipi_nmi: Add support for NMI backtrace Sumit Garg
2020-10-15 1:17 ` Masayoshi Mizuma
2020-10-19 12:20 ` Marc Zyngier
2020-10-20 9:13 ` Sumit Garg
2020-10-21 10:32 ` Marc Zyngier
2020-10-21 11:28 ` Sumit Garg
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1602673931-28782-3-git-send-email-sumit.garg@linaro.org \
--to=sumit.garg@linaro.org \
--cc=catalin.marinas@arm.com \
--cc=daniel.thompson@linaro.org \
--cc=dianders@chromium.org \
--cc=ito-yuichi@fujitsu.com \
--cc=jason.wessel@windriver.com \
--cc=jason@lakedaemon.net \
--cc=julien.thierry.kdev@gmail.com \
--cc=kgdb-bugreport@lists.sourceforge.net \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=maz@kernel.org \
--cc=msys.mizuma@gmail.com \
--cc=tglx@linutronix.de \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).