linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: kishon@ti.com (Kishon Vijay Abraham I)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 19/23] tools: PCI: Add a userspace tool to test PCI endpoint
Date: Wed, 5 Apr 2017 14:22:39 +0530	[thread overview]
Message-ID: <20170405085243.18123-20-kishon@ti.com> (raw)
In-Reply-To: <20170405085243.18123-1-kishon@ti.com>

Add a userspace tool to invoke the ioctls exposed by the PCI endpoint test
driver to perform various PCI tests.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 tools/pci/pcitest.c | 186 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 186 insertions(+)
 create mode 100644 tools/pci/pcitest.c

diff --git a/tools/pci/pcitest.c b/tools/pci/pcitest.c
new file mode 100644
index 000000000000..ad54a58d7dda
--- /dev/null
+++ b/tools/pci/pcitest.c
@@ -0,0 +1,186 @@
+/**
+ * Userspace PCI Endpoint Test Module
+ *
+ * Copyright (C) 2017 Texas Instruments
+ * Author: Kishon Vijay Abraham I <kishon@ti.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <errno.h>
+#include <fcntl.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/ioctl.h>
+#include <time.h>
+#include <unistd.h>
+
+#include <linux/pcitest.h>
+
+#define BILLION 1E9
+
+static char *result[] = { "NOT OKAY", "OKAY" };
+
+struct pci_test {
+	char		*device;
+	char		barnum;
+	bool		legacyirq;
+	unsigned int	msinum;
+	bool		read;
+	bool		write;
+	bool		copy;
+	unsigned long	size;
+};
+
+static int run_test(struct pci_test *test)
+{
+	long ret;
+	int fd;
+	struct timespec start, end;
+	double time;
+
+	fd = open(test->device, O_RDWR);
+	if (fd < 0) {
+		perror("can't open PCI Endpoint Test device");
+		return fd;
+	}
+
+	if (test->barnum >= 0 && test->barnum <= 5) {
+		ret = ioctl(fd, PCITEST_BAR, test->barnum);
+		fprintf(stdout, "BAR%d:\t\t", test->barnum);
+		if (ret < 0)
+			fprintf(stdout, "TEST FAILED\n");
+		else
+			fprintf(stdout, "%s\n", result[ret]);
+	}
+
+	if (test->legacyirq) {
+		ret = ioctl(fd, PCITEST_LEGACY_IRQ, 0);
+		fprintf(stdout, "LEGACY IRQ:\t");
+		if (ret < 0)
+			fprintf(stdout, "TEST FAILED\n");
+		else
+			fprintf(stdout, "%s\n", result[ret]);
+	}
+
+	if (test->msinum > 0 && test->msinum <= 32) {
+		ret = ioctl(fd, PCITEST_MSI, test->msinum);
+		fprintf(stdout, "MSI%d:\t\t", test->msinum);
+		if (ret < 0)
+			fprintf(stdout, "TEST FAILED\n");
+		else
+			fprintf(stdout, "%s\n", result[ret]);
+	}
+
+	if (test->write) {
+		ret = ioctl(fd, PCITEST_WRITE, test->size);
+		fprintf(stdout, "WRITE (%7ld bytes):\t\t", test->size);
+		if (ret < 0)
+			fprintf(stdout, "TEST FAILED\n");
+		else
+			fprintf(stdout, "%s\n", result[ret]);
+	}
+
+	if (test->read) {
+		ret = ioctl(fd, PCITEST_READ, test->size);
+		fprintf(stdout, "READ (%7ld bytes):\t\t", test->size);
+		if (ret < 0)
+			fprintf(stdout, "TEST FAILED\n");
+		else
+			fprintf(stdout, "%s\n", result[ret]);
+	}
+
+	if (test->copy) {
+		ret = ioctl(fd, PCITEST_COPY, test->size);
+		fprintf(stdout, "COPY (%7ld bytes):\t\t", test->size);
+		if (ret < 0)
+			fprintf(stdout, "TEST FAILED\n");
+		else
+			fprintf(stdout, "%s\n", result[ret]);
+	}
+
+	fflush(stdout);
+}
+
+int main(int argc, char **argv)
+{
+	int c;
+	struct pci_test *test;
+
+	test = calloc(1, sizeof(*test));
+	if (!test) {
+		perror("Fail to allocate memory for pci_test\n");
+		return -ENOMEM;
+	}
+
+	/* since '0' is a valid BAR number, initialize it to -1 */
+	test->barnum = -1;
+
+	/* set default size as 100KB */
+	test->size = 0x19000;
+
+	/* set default endpoint device */
+	test->device = "/dev/pci-endpoint-test.0";
+
+	while ((c = getopt(argc, argv, "D:b:m:lrwcs:")) != EOF)
+	switch (c) {
+	case 'D':
+		test->device = optarg;
+		continue;
+	case 'b':
+		test->barnum = atoi(optarg);
+		if (test->barnum < 0 || test->barnum > 5)
+			goto usage;
+		continue;
+	case 'l':
+		test->legacyirq = true;
+		continue;
+	case 'm':
+		test->msinum = atoi(optarg);
+		if (test->msinum < 1 || test->msinum > 32)
+			goto usage;
+		continue;
+	case 'r':
+		test->read = true;
+		continue;
+	case 'w':
+		test->write = true;
+		continue;
+	case 'c':
+		test->copy = true;
+		continue;
+	case 's':
+		test->size = strtoul(optarg, NULL, 0);
+		continue;
+	case '?':
+	case 'h':
+	default:
+usage:
+		fprintf(stderr,
+			"usage: %s [options]\n"
+			"Options:\n"
+			"\t-D <dev>		PCI endpoint test device {default: /dev/pci-endpoint-test.0}\n"
+			"\t-b <bar num>		BAR test (bar number between 0..5)\n"
+			"\t-m <msi num>		MSI test (msi number between 1..32)\n"
+			"\t-r			Read buffer test\n"
+			"\t-w			Write buffer test\n"
+			"\t-c			Copy buffer test\n"
+			"\t-s <size>		Size of buffer {default: 100KB}\n",
+			argv[0]);
+		return -EINVAL;
+	}
+
+	run_test(test);
+	return 0;
+}
-- 
2.11.0

  parent reply	other threads:[~2017-04-05  8:52 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-05  8:52 [GIT PULL] PCI: Support for configurable PCI endpoint Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 01/23] PCI: endpoint: Add EP core layer to enable EP controller and EP functions Kishon Vijay Abraham I
2017-04-05 16:52   ` Bjorn Helgaas
2017-04-06  5:19     ` Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 02/23] Documentation: PCI: Guide to use PCI Endpoint Core Layer Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 03/23] PCI: endpoint: Introduce configfs entry for configuring EP functions Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 04/23] Documentation: PCI: Guide to use PCI endpoint configfs Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 05/23] PCI: endpoint: Create configfs entry for EPC device and EPF driver Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 06/23] Documentation: PCI: Add specification for the *PCI test* function device Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 07/23] PCI: endpoint: functions: Add an EP function to test PCI Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 08/23] Documentation: PCI: Add binding documentation for pci-test endpoint function Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 09/23] PCI: dwc: designware: Add EP mode support Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 10/23] dt-bindings: PCI: Add DT bindings for PCI designware EP mode Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 11/23] PCI: dwc: dra7xx: Facilitate wrapper and MSI interrupts to be enabled independently Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 12/23] PCI: dwc: dra7xx: Add EP mode support Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 13/23] dt-bindings: PCI: dra7xx: Add DT bindings for PCI dra7xx EP mode Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 14/23] PCI: dwc: dra7xx: Workaround for errata id i870 Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 15/23] dt-bindings: PCI: dra7xx: Add DT bindings to enable unaligned access Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 16/23] PCI: Add device IDs for DRA74x and DRA72x Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 17/23] misc: Add host side PCI driver for PCI test function device Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 18/23] Documentation: misc-devices: Add Documentation for pci-endpoint-test driver Kishon Vijay Abraham I
2017-04-05  8:52 ` Kishon Vijay Abraham I [this message]
2017-04-05  8:52 ` [PATCH v6 20/23] tools: PCI: Add sample test script to invoke pcitest Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 21/23] Documentation: PCI: Add userguide for PCI endpoint test function Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 22/23] MAINTAINERS: Add PCI Endpoint maintainer Kishon Vijay Abraham I
2017-04-05  8:52 ` [PATCH v6 23/23] ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP Kishon Vijay Abraham I
2017-04-10 13:55 ` [PATCH v7 01/23] PCI: endpoint: Add EP core layer to enable EP controller and EP functions Kishon Vijay Abraham I
2022-12-13 23:44   ` Bjorn Helgaas
2017-04-10 15:43 ` [GIT PULL] PCI: Support for configurable PCI endpoint Bjorn Helgaas
2017-04-11 19:34   ` Bjorn Helgaas
2017-04-12  5:43     ` Kishon Vijay Abraham I

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20170405085243.18123-20-kishon@ti.com \
    --to=kishon@ti.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).