From: Johan Jonker <jbx6244@gmail.com>
To: heiko@sntech.de
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
linux-rockchip@lists.infradead.org, airlied@linux.ie,
mturquette@baylibre.com, hjc@rock-chips.com,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
sboyd@kernel.org, robh+dt@kernel.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 5/7] ARM: dts: rockchip: add rk3066 vop display nodes
Date: Sat, 29 Dec 2018 14:33:16 +0100 [thread overview]
Message-ID: <20181229133318.18128-6-jbx6244@gmail.com> (raw)
In-Reply-To: <20181229133318.18128-1-jbx6244@gmail.com>
From: Mark Yao <mark.yao@rock-chips.com>
This patch adds the core display subsystem and vop nodes to rk3066.
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm/boot/dts/rk3066a.dtsi | 47 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 47 insertions(+)
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index b6b3a77da..653127a37 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -44,6 +44,11 @@
};
};
+ display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <&vop0_out>, <&vop1_out>;
+ };
+
sram: sram@10080000 {
compatible = "mmio-sram";
reg = <0x10080000 0x10000>;
@@ -57,6 +62,48 @@
};
};
+ vop0: vop@1010c000 {
+ compatible = "rockchip,rk3066-vop";
+ reg = <0x1010c000 0x19c>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru ACLK_LCDC0>,
+ <&cru DCLK_LCDC0>,
+ <&cru HCLK_LCDC0>;
+ clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+ power-domains = <&power RK3066_PD_VIO>;
+ resets = <&cru SRST_LCDC0_AXI>,
+ <&cru SRST_LCDC0_AHB>,
+ <&cru SRST_LCDC0_DCLK>;
+ reset-names = "axi", "ahb", "dclk";
+ status = "disabled";
+
+ vop0_out: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ vop1: vop@1010e000 {
+ compatible = "rockchip,rk3066-vop";
+ reg = <0x1010e000 0x19c>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru ACLK_LCDC1>,
+ <&cru DCLK_LCDC1>,
+ <&cru HCLK_LCDC1>;
+ clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+ power-domains = <&power RK3066_PD_VIO>;
+ resets = <&cru SRST_LCDC1_AXI>,
+ <&cru SRST_LCDC1_AHB>,
+ <&cru SRST_LCDC1_DCLK>;
+ reset-names = "axi", "ahb", "dclk";
+ status = "disabled";
+
+ vop1_out: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
i2s0: i2s@10118000 {
compatible = "rockchip,rk3066-i2s";
reg = <0x10118000 0x2000>;
--
2.11.0
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next prev parent reply other threads:[~2018-12-29 13:36 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-29 13:33 [PATCH v2 0/7] Enable rk3066 VOP and HDMI for MK808 Johan Jonker
2018-12-29 13:33 ` [PATCH v2 1/7] ARM: dts: rockchip: rk3066: add HCLK_HDMI to pmu node Johan Jonker
2018-12-30 14:03 ` Heiko Stuebner
2018-12-29 13:33 ` [PATCH v2 2/7] clk: rockchip: rk3188: add CLK_SET_RATE_PARENT for lcdc dclk Johan Jonker
2018-12-30 17:05 ` Heiko Stuebner
2018-12-29 13:33 ` [PATCH v2 3/7] drm: rockchip: vop: add rk3066 vop definitions Johan Jonker
2018-12-30 17:22 ` Heiko Stuebner
2019-01-11 14:54 ` Rob Herring
2019-01-12 18:53 ` Heiko Stuebner
2018-12-29 13:33 ` [PATCH v2 4/7] drm: rockchip: introduce rk3066 hdmi Johan Jonker
2019-02-01 14:25 ` Johan Jonker
2018-12-29 13:33 ` Johan Jonker [this message]
2019-01-12 19:24 ` [PATCH v2 5/7] ARM: dts: rockchip: add rk3066 vop display nodes Heiko Stuebner
2018-12-29 13:33 ` [PATCH v2 6/7] ARM: dts: rockchip: add rk3066 hdmi nodes Johan Jonker
2018-12-29 13:33 ` [PATCH v2 7/7] ARM: dts: rockchip: rk3066a-mk808: enable vop0 and " Johan Jonker
2019-02-01 12:32 ` [PATCH] dt-bindings: display: rockchip: add document for rk3066 hdmi Johan Jonker
2019-02-25 16:59 ` Rob Herring
2019-02-27 18:04 ` Johan Jonker
2019-02-27 19:06 ` Rob Herring
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