From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Remi Pommarel <repk@triplefau.lt>
Cc: Ellie Reeves <ellierevves@gmail.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
Bjorn Helgaas <helgaas@kernel.org>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3] PCI: aardvark: Fix PCI_EXP_RTCTL register configuration
Date: Thu, 27 Jun 2019 15:22:41 +0100 [thread overview]
Message-ID: <20190627142241.GB3782@e121166-lin.cambridge.arm.com> (raw)
In-Reply-To: <20190617124328.GA27113@e121166-lin.cambridge.arm.com>
On Mon, Jun 17, 2019 at 01:43:36PM +0100, Lorenzo Pieralisi wrote:
> On Fri, Jun 14, 2019 at 12:10:59PM +0200, Remi Pommarel wrote:
> > PCI_EXP_RTCTL is used to activate PME interrupt only, so writing into it
> > should not modify other interrupts' mask. The ISR mask polarity was also
> > inverted, when PCI_EXP_RTCTL_PMEIE is set PCIE_MSG_PM_PME_MASK mask bit
> > should actually be cleared.
> >
> > Fixes: 8a3ebd8de328 ("PCI: aardvark: Implement emulated root PCI bridge config space")
> > Signed-off-by: Remi Pommarel <repk@triplefau.lt>
> > ---
> > Changes since v1:
> > * Improve code readability
> > * Fix mask polarity
> > * PME_MASK shift was off by one
> > Changes since v2:
> > * Modify patch title
> > * Change Fixes tag to commit that actually introduces the bug
> > ---
> > drivers/pci/controller/pci-aardvark.c | 13 +++++++++----
> > 1 file changed, 9 insertions(+), 4 deletions(-)
>
> I need Thomas' ACK to apply it, thanks.
I still need it :), thanks.
Lorenzo
> Lorenzo
>
> > diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
> > index 134e0306ff00..f6e55c4597b1 100644
> > --- a/drivers/pci/controller/pci-aardvark.c
> > +++ b/drivers/pci/controller/pci-aardvark.c
> > @@ -415,7 +415,7 @@ advk_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
> >
> > case PCI_EXP_RTCTL: {
> > u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG);
> > - *value = (val & PCIE_MSG_PM_PME_MASK) ? PCI_EXP_RTCTL_PMEIE : 0;
> > + *value = (val & PCIE_MSG_PM_PME_MASK) ? 0 : PCI_EXP_RTCTL_PMEIE;
> > return PCI_BRIDGE_EMUL_HANDLED;
> > }
> >
> > @@ -451,10 +451,15 @@ advk_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge,
> > advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg);
> > break;
> >
> > - case PCI_EXP_RTCTL:
> > - new = (new & PCI_EXP_RTCTL_PMEIE) << 3;
> > - advk_writel(pcie, new, PCIE_ISR0_MASK_REG);
> > + case PCI_EXP_RTCTL: {
> > + /* Only mask/unmask PME interrupt */
> > + u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG) &
> > + ~PCIE_MSG_PM_PME_MASK;
> > + if ((new & PCI_EXP_RTCTL_PMEIE) == 0)
> > + val |= PCIE_MSG_PM_PME_MASK;
> > + advk_writel(pcie, val, PCIE_ISR0_MASK_REG);
> > break;
> > + }
> >
> > case PCI_EXP_RTSTA:
> > new = (new & PCI_EXP_RTSTA_PME) >> 9;
> > --
> > 2.20.1
> >
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next prev parent reply other threads:[~2019-06-27 14:22 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-14 10:10 [PATCH v3] PCI: aardvark: Fix PCI_EXP_RTCTL register configuration Remi Pommarel
2019-06-17 12:43 ` Lorenzo Pieralisi
2019-06-27 14:22 ` Lorenzo Pieralisi [this message]
2019-08-06 16:28 ` Lorenzo Pieralisi
2019-09-25 12:08 ` Thomas Petazzoni
2019-10-15 10:00 ` Lorenzo Pieralisi
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