From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Stephen Boyd <sboyd@kernel.org>
Cc: devicetree@vger.kernel.org, mturquette@baylibre.com,
linux-kernel@vger.kernel.org, darren.tsao@bitmain.com,
robh+dt@kernel.org, haitao.suo@bitmain.com,
fisher.cheng@bitmain.com, alec.lin@bitmain.com,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/5] dt-bindings: clock: Add Bitmain BM1880 SoC clock controller binding
Date: Sat, 17 Aug 2019 09:28:45 +0530 [thread overview]
Message-ID: <20190817035845.GD14652@Mani-XPS-13-9360> (raw)
In-Reply-To: <20190817034612.6DA7E21721@mail.kernel.org>
On Fri, Aug 16, 2019 at 08:46:11PM -0700, Stephen Boyd wrote:
> Quoting Manivannan Sadhasivam (2019-08-16 20:34:22)
> > On Wed, Aug 07, 2019 at 10:01:28PM -0700, Stephen Boyd wrote:
> > > Quoting Manivannan Sadhasivam (2019-07-05 08:14:36)
> > > > +It is expected that it is defined using standard clock bindings as "osc".
> > > > +
> > > > +Example:
> > > > +
> > > > + clk: clock-controller@800 {
> > > > + compatible = "bitmain,bm1880-clk";
> > > > + reg = <0xe8 0x0c>,<0x800 0xb0>;
> > >
> > > It looks weird still. What hardware module is this actually part of?
> > > Some larger power manager block?
> > >
> >
> > These are all part of the sysctrl block (clock + pinctrl + reset) and the
> > register domains got split between system and pll.
> >
>
> And that can't be one node that probes the clk, pinctrl, and reset
> drivers from C code?
It is not a MFD for sure. It's just grouping of the register domains together.
Thanks,
Mani
>
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next prev parent reply other threads:[~2019-08-17 3:59 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-05 15:14 [PATCH 0/5] Add Bitmain BM1880 clock driver Manivannan Sadhasivam
2019-07-05 15:14 ` [PATCH 1/5] dt-bindings: clock: Add Bitmain BM1880 SoC clock controller binding Manivannan Sadhasivam
2019-07-24 16:18 ` Rob Herring
2019-08-08 5:01 ` Stephen Boyd
2019-08-17 3:34 ` Manivannan Sadhasivam
2019-08-17 3:46 ` Stephen Boyd
2019-08-17 3:58 ` Manivannan Sadhasivam [this message]
2019-08-18 1:16 ` Stephen Boyd
2019-07-05 15:14 ` [PATCH 2/5] arm64: dts: bitmain: Add clock controller support for BM1880 SoC Manivannan Sadhasivam
2019-07-05 15:14 ` [PATCH 3/5] arm64: dts: bitmain: Source common clock for UART controllers Manivannan Sadhasivam
2019-07-05 15:14 ` [PATCH 4/5] clk: Add driver for Bitmain BM1880 SoC clock controller Manivannan Sadhasivam
2019-08-08 5:15 ` Stephen Boyd
2019-08-17 3:55 ` Manivannan Sadhasivam
2019-08-18 1:21 ` Stephen Boyd
2019-07-05 15:14 ` [PATCH 5/5] MAINTAINERS: Add entry for Bitmain BM1880 SoC clock driver Manivannan Sadhasivam
2019-07-22 6:20 ` [PATCH 0/5] Add Bitmain BM1880 " Manivannan Sadhasivam
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