From: Raphael Gault <raphael.gault@arm.com>
To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: mark.rutland@arm.com, raph.gault+kdev@gmail.com,
peterz@infradead.org, catalin.marinas@arm.com,
will.deacon@arm.com, acme@kernel.org,
Raphael Gault <raphael.gault@arm.com>,
mingo@redhat.com
Subject: [PATCH v4 5/7] arm64: pmu: Add function implementation to update event index in userpage.
Date: Thu, 22 Aug 2019 15:42:18 +0100 [thread overview]
Message-ID: <20190822144220.27860-6-raphael.gault@arm.com> (raw)
In-Reply-To: <20190822144220.27860-1-raphael.gault@arm.com>
In order to be able to access the counter directly for userspace,
we need to provide the index of the counter using the userpage.
We thus need to override the event_idx function to retrieve and
convert the perf_event index to armv8 hardware index.
Since the arm_pmu driver can be used by any implementation, even
if not armv8, two components play a role into making sure the
behaviour is correct and consistent with the PMU capabilities:
* the ARMPMU_EL0_RD_CNTR flag which denotes the capability to access
counter from userspace.
* the event_idx call back, which is implemented and initialized by
the PMU implementation: if no callback is provided, the default
behaviour applies, returning 0 as index value.
Signed-off-by: Raphael Gault <raphael.gault@arm.com>
---
arch/arm64/kernel/perf_event.c | 21 +++++++++++++++++++++
include/linux/perf/arm_pmu.h | 2 ++
2 files changed, 23 insertions(+)
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index 64ca09c9ea65..de9b001e8b7c 100644
--- a/arch/arm64/kernel/perf_event.c
+++ b/arch/arm64/kernel/perf_event.c
@@ -820,6 +820,22 @@ static void armv8pmu_clear_event_idx(struct pmu_hw_events *cpuc,
clear_bit(idx - 1, cpuc->used_mask);
}
+static int armv8pmu_access_event_idx(struct perf_event *event)
+{
+ if (!(event->hw.flags & ARMPMU_EL0_RD_CNTR))
+ return 0;
+
+ /*
+ * We remap the cycle counter index to 32 to
+ * match the offset applied to the rest of
+ * the counter indices.
+ */
+ if (event->hw.idx == ARMV8_IDX_CYCLE_COUNTER)
+ return 32;
+
+ return event->hw.idx;
+}
+
/*
* Add an event filter to a given event.
*/
@@ -913,6 +929,9 @@ static int __armv8_pmuv3_map_event(struct perf_event *event,
if (armv8pmu_event_is_64bit(event))
event->hw.flags |= ARMPMU_EVT_64BIT;
+ if (cpus_have_cap(ARM64_HAS_HOMOGENEOUS_PMU))
+ event->hw.flags |= ARMPMU_EL0_RD_CNTR;
+
/* Only expose micro/arch events supported by this PMU */
if ((hw_event_id > 0) && (hw_event_id < ARMV8_PMUV3_MAX_COMMON_EVENTS)
&& test_bit(hw_event_id, armpmu->pmceid_bitmap)) {
@@ -1086,6 +1105,8 @@ static int armv8_pmu_init(struct arm_pmu *cpu_pmu)
cpu_pmu->set_event_filter = armv8pmu_set_event_filter;
cpu_pmu->filter_match = armv8pmu_filter_match;
+ cpu_pmu->pmu.event_idx = armv8pmu_access_event_idx;
+
return 0;
}
diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h
index 71f525a35ac2..1106a9ac00fd 100644
--- a/include/linux/perf/arm_pmu.h
+++ b/include/linux/perf/arm_pmu.h
@@ -26,6 +26,8 @@
*/
/* Event uses a 64bit counter */
#define ARMPMU_EVT_64BIT 1
+/* Allow access to hardware counter from userspace */
+#define ARMPMU_EL0_RD_CNTR 2
#define HW_OP_UNSUPPORTED 0xFFFF
#define C(_x) PERF_COUNT_HW_CACHE_##_x
--
2.17.1
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next prev parent reply other threads:[~2019-08-22 14:44 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-22 14:42 [PATCH v4 0/7] arm64: Enable access to pmu registers by user-space Raphael Gault
2019-08-22 14:42 ` [PATCH v4 1/7] perf: arm64: Add test to check userspace access to hardware counters Raphael Gault
2019-08-27 11:17 ` Jonathan Cameron
2020-06-03 16:19 ` Rob Herring
2019-08-22 14:42 ` [PATCH v4 2/7] arm64: cpu: Add accessor for boot_cpu_data Raphael Gault
2019-08-22 14:42 ` [PATCH v4 3/7] arm64: cpufeature: Add feature to detect homogeneous systems Raphael Gault
2019-08-22 14:42 ` [PATCH v4 4/7] arm64: pmu: Add hook to handle pmu-related undefined instructions Raphael Gault
2019-08-22 14:42 ` Raphael Gault [this message]
2019-08-22 14:42 ` [PATCH v4 6/7] arm64: perf: Enable pmu counter direct access for perf event on armv8 Raphael Gault
2019-08-22 16:39 ` Jonathan Cameron
2019-08-22 14:42 ` [PATCH v4 7/7] Documentation: arm64: Document PMU counters access from userspace Raphael Gault
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