From: Sasha Levin <sashal@kernel.org>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: Sasha Levin <sashal@kernel.org>,
Jean-Philippe Brucker <jean-philippe@linaro.org>,
iommu@lists.linux-foundation.org, Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH AUTOSEL 4.14 131/186] iommu/arm-smmu-v3: Use WRITE_ONCE() when changing validity of an STE
Date: Fri, 14 Feb 2020 11:16:20 -0500 [thread overview]
Message-ID: <20200214161715.18113-131-sashal@kernel.org> (raw)
In-Reply-To: <20200214161715.18113-1-sashal@kernel.org>
From: Will Deacon <will@kernel.org>
[ Upstream commit d71e01716b3606a6648df7e5646ae12c75babde4 ]
If, for some bizarre reason, the compiler decided to split up the write
of STE DWORD 0, we could end up making a partial structure valid.
Although this probably won't happen, follow the example of the
context-descriptor code and use WRITE_ONCE() to ensure atomicity of the
write.
Reported-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/iommu/arm-smmu-v3.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 09eb258a9a7de..29feafa8007fb 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -1145,7 +1145,8 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_device *smmu, u32 sid,
}
arm_smmu_sync_ste_for_sid(smmu, sid);
- dst[0] = cpu_to_le64(val);
+ /* See comment in arm_smmu_write_ctx_desc() */
+ WRITE_ONCE(dst[0], cpu_to_le64(val));
arm_smmu_sync_ste_for_sid(smmu, sid);
/* It's likely that we'll want to use the new STE soon */
--
2.20.1
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next prev parent reply other threads:[~2020-02-14 16:52 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20200214161715.18113-1-sashal@kernel.org>
2020-02-14 16:14 ` [PATCH AUTOSEL 4.14 004/186] soc: fsl: qe: change return type of cpm_muram_alloc() to s32 Sasha Levin
2020-02-14 16:14 ` [PATCH AUTOSEL 4.14 027/186] arm64: cpufeature: Fix the type of no FP/SIMD capability Sasha Levin
2020-02-14 16:14 ` [PATCH AUTOSEL 4.14 031/186] clocksource/drivers/bcm2835_timer: Fix memory leak of timer Sasha Levin
2020-02-14 16:14 ` [PATCH AUTOSEL 4.14 035/186] scsi: ufs: Fix ufshcd_probe_hba() reture value in case ufshcd_scsi_add_wlus() fails Sasha Levin
2020-02-14 16:15 ` [PATCH AUTOSEL 4.14 066/186] arm: dts: allwinner: H3: Add PMU node Sasha Levin
2020-02-14 16:15 ` [PATCH AUTOSEL 4.14 070/186] ARM: dts: imx6: rdu2: Disable WP for USDHC2 and USDHC3 Sasha Levin
2020-02-14 16:15 ` [PATCH AUTOSEL 4.14 077/186] Revert "tty/serial: atmel: fix out of range clock divider handling" Sasha Levin
2020-02-14 16:15 ` [PATCH AUTOSEL 4.14 087/186] drm/mediatek: handle events when enabling/disabling crtc Sasha Levin
2020-02-14 16:15 ` [PATCH AUTOSEL 4.14 097/186] clk: sunxi-ng: add mux and pll notifiers for A64 CPU clock Sasha Levin
2020-02-14 16:15 ` [PATCH AUTOSEL 4.14 104/186] soc: fsl: qe: remove set but not used variable 'mm_gc' Sasha Levin
2020-02-14 16:15 ` [PATCH AUTOSEL 4.14 106/186] crypto: atmel-sha - fix error handling when setting hmac key Sasha Levin
2020-02-14 16:16 ` [PATCH AUTOSEL 4.14 111/186] ARM: dts: at91: sama5d3: fix maximum peripheral clock rates Sasha Levin
2020-02-14 16:16 ` [PATCH AUTOSEL 4.14 112/186] ARM: dts: at91: sama5d3: define clock rate range for tcb1 Sasha Levin
2020-02-14 16:16 ` [PATCH AUTOSEL 4.14 117/186] ASoC: atmel: fix build error with CONFIG_SND_ATMEL_SOC_DMA=m Sasha Levin
2020-02-14 16:16 ` Sasha Levin [this message]
2020-02-14 16:16 ` [PATCH AUTOSEL 4.14 134/186] arm64: fix alternatives with LLVM's integrated assembler Sasha Levin
2020-02-14 16:16 ` [PATCH AUTOSEL 4.14 136/186] ACPI/IORT: Fix 'Number of IDs' handling in iort_id_map() Sasha Levin
2020-02-14 16:16 ` [PATCH AUTOSEL 4.14 159/186] ARM: 8951/1: Fix Kexec compilation issue Sasha Levin
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