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From: Fabien Parent <fparent@baylibre.com>
To: linux-mediatek@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	dri-devel@lists.freedesktop.org
Cc: chunkuang.hu@kernel.org, daniel@ffwll.ch, airlied@linux.ie,
	Fabien Parent <fparent@baylibre.com>,
	robh+dt@kernel.org, p.zabel@pengutronix.de,
	matthias.bgg@gmail.com
Subject: [PATCH 5/8] drm/mediatek: dsi: add support for mipi26m clk
Date: Tue, 20 Oct 2020 19:42:50 +0200	[thread overview]
Message-ID: <20201020174253.3757771-6-fparent@baylibre.com> (raw)
In-Reply-To: <20201020174253.3757771-1-fparent@baylibre.com>

MT8167 SoC needs an additional clock to be enabled. Add support for
the mipi26m clk.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
 drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
index 461643c05689..08786734df8e 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -193,6 +193,7 @@ struct mtk_dsi {
 	struct clk *engine_clk;
 	struct clk *digital_clk;
 	struct clk *hs_clk;
+	struct clk *mipi26m;
 
 	u32 data_rate;
 
@@ -653,6 +654,12 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi)
 		goto err_disable_engine_clk;
 	}
 
+	ret = clk_prepare_enable(dsi->mipi26m);
+	if (ret < 0) {
+		dev_err(dev, "Failed to enable mipi26m clock: %d\n", ret);
+		goto err_phy_power_off;
+	}
+
 	mtk_dsi_enable(dsi);
 
 	if (dsi->driver_data->has_shadow_ctl)
@@ -710,6 +717,7 @@ static void mtk_dsi_poweroff(struct mtk_dsi *dsi)
 
 	clk_disable_unprepare(dsi->engine_clk);
 	clk_disable_unprepare(dsi->digital_clk);
+	clk_disable_unprepare(dsi->mipi26m);
 
 	phy_power_off(dsi->phy);
 }
@@ -1086,6 +1094,8 @@ static int mtk_dsi_probe(struct platform_device *pdev)
 		goto err_unregister_host;
 	}
 
+	dsi->mipi26m = devm_clk_get_optional(dev, "mipi26m");
+
 	dsi->hs_clk = devm_clk_get(dev, "hs");
 	if (IS_ERR(dsi->hs_clk)) {
 		ret = PTR_ERR(dsi->hs_clk);
-- 
2.28.0


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  parent reply	other threads:[~2020-10-20 17:45 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-20 17:42 [PATCH 0/8] Add DRM/DSI support for MT8167 SoC Fabien Parent
2020-10-20 17:42 ` [PATCH 1/8] dt-bindings: display: mediatek: disp: add documentation " Fabien Parent
2020-10-21 23:40   ` Chun-Kuang Hu
2020-10-20 17:42 ` [PATCH 2/8] dt-bindings: display: mediatek: dsi: " Fabien Parent
2020-10-21 17:01   ` Chun-Kuang Hu
2020-10-21 18:56     ` Fabien Parent
2020-10-20 17:42 ` [PATCH 3/8] drm/mediatek: add disp-color MT8167 support Fabien Parent
2020-10-21 23:42   ` Chun-Kuang Hu
2020-10-20 17:42 ` [PATCH 4/8] drm/mediatek: dsi: add pdata variable to start clk in HS mode Fabien Parent
2020-10-21 17:07   ` Chun-Kuang Hu
2020-10-22 16:48     ` Fabien Parent
2020-10-20 17:42 ` Fabien Parent [this message]
2020-10-20 17:42 ` [PATCH 6/8] drm/mediatek: dsi: add support for MT8167 SoC Fabien Parent
2020-10-20 17:42 ` [PATCH 7/8] drm/mediatek: add DDP support for MT8167 Fabien Parent
2020-10-21 23:56   ` Chun-Kuang Hu
2020-10-20 17:42 ` [PATCH 8/8] drm/mediatek: Add support for main DDP path on MT8167 Fabien Parent

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