From: Will Deacon <will@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Mark Brown <broonie@kernel.org>,
linux-arm-kernel@lists.infradead.org,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH] arm64: Document requirements for fine grained traps at boot
Date: Mon, 29 Mar 2021 11:31:27 +0100 [thread overview]
Message-ID: <20210329103126.GE3207@willie-the-truck> (raw)
In-Reply-To: <20210326115541.GC5126@arm.com>
On Fri, Mar 26, 2021 at 11:55:41AM +0000, Catalin Marinas wrote:
> On Fri, Mar 12, 2021 at 03:49:17PM +0000, Mark Brown wrote:
> > The arm64 FEAT_FGT extension introduces a set of traps to EL2 for accesses
> > to small sets of registers and instructions from EL1 and EL0. Currently
> > Linux makes no use of this feature, explicitly document that it should
> > be disabled when entering the kernel at EL2 (as is the architectural
> > default) to help avoid surprises.
> >
> > Signed-off-by: Mark Brown <broonie@kernel.org>
> > ---
> > Documentation/arm64/booting.rst | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/Documentation/arm64/booting.rst b/Documentation/arm64/booting.rst
> > index 7552dbc1cc54..1efc2d3023bb 100644
> > --- a/Documentation/arm64/booting.rst
> > +++ b/Documentation/arm64/booting.rst
> > @@ -270,6 +270,13 @@ Before jumping into the kernel, the following conditions must be met:
> > having 0b1 set for the corresponding bit for each of the auxiliary
> > counters present.
> >
> > + For CPUs with Fine Grained Traps (FEAT_FGT) extension present:
> > +
> > + - If the kernel is entered at EL2:
> > +
> > + - HAFGRTR_EL2, HDFGWTR_EL2, HDFGRTR_EL2, HFGWTR_EL2, HFGRTR_EL2 and
> > + HFGITR_EL2 must be initialised to 0.
>
> While this requirement is correct, documenting such individual registers
> doesn't scales well. You may run a 5 year old kernel on a newer CPU and
> we can't predict which control registers have been added and what
> side-effect they have. The architecture, at least for the above
> registers, states that if warm reset to EL2, their value is 0. I think
> the EL3 firmware (which is normally up to date with the CPU it is
> running on) should follow the ARM ARM reset values. There are probably
> EL1 registers with similar requirements (I haven't checked).
One thing I don't understand about the registers listed here is that we're
requiring firmware to initialise them when the kernel is entered at EL2. But
they're *_EL2 registers, so why can't the kernel initialise them itself? The
fewer dependencies on firmware, the better.
Will
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next prev parent reply other threads:[~2021-03-29 21:45 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-12 15:49 [PATCH] arm64: Document requirements for fine grained traps at boot Mark Brown
2021-03-26 11:55 ` Catalin Marinas
2021-03-29 10:31 ` Will Deacon [this message]
2021-03-29 12:16 ` Catalin Marinas
2021-03-29 12:25 ` Mark Brown
2021-03-29 17:06 ` Mark Brown
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