From: Andrew Jones <drjones@redhat.com>
To: Marc Zyngier <maz@kernel.org>
Cc: kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, will@kernel.org,
james.morse@arm.com, alexandru.elisei@arm.com,
suzuki.poulose@arm.com, mark.rutland@arm.com,
pbonzini@redhat.com, oupton@google.com, qperret@google.com,
kernel-team@android.com, tabba@google.com
Subject: Re: [PATCH v9 13/22] KVM: arm64: pkvm: Use a single function to expose all id-regs
Date: Thu, 14 Oct 2021 11:04:11 +0200 [thread overview]
Message-ID: <20211014090411.dk2whm76hwsems6j@gator.home> (raw)
In-Reply-To: <20211013120346.2926621-3-maz@kernel.org>
On Wed, Oct 13, 2021 at 01:03:37PM +0100, Marc Zyngier wrote:
> Rather than exposing a whole set of helper functions to retrieve
> individual ID registers, use the existing decoding tree and expose
> a single helper instead.
>
> This allow a number of functions to be made static, and we now
> have a single entry point to maintain.
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> ---
> arch/arm64/kvm/hyp/include/nvhe/sys_regs.h | 14 +-------
> arch/arm64/kvm/hyp/nvhe/pkvm.c | 10 +++---
> arch/arm64/kvm/hyp/nvhe/sys_regs.c | 37 ++++++++++++----------
> 3 files changed, 26 insertions(+), 35 deletions(-)
>
> diff --git a/arch/arm64/kvm/hyp/include/nvhe/sys_regs.h b/arch/arm64/kvm/hyp/include/nvhe/sys_regs.h
> index 3288128738aa..8adc13227b1a 100644
> --- a/arch/arm64/kvm/hyp/include/nvhe/sys_regs.h
> +++ b/arch/arm64/kvm/hyp/include/nvhe/sys_regs.h
> @@ -9,19 +9,7 @@
>
> #include <asm/kvm_host.h>
>
> -u64 get_pvm_id_aa64pfr0(const struct kvm_vcpu *vcpu);
> -u64 get_pvm_id_aa64pfr1(const struct kvm_vcpu *vcpu);
> -u64 get_pvm_id_aa64zfr0(const struct kvm_vcpu *vcpu);
> -u64 get_pvm_id_aa64dfr0(const struct kvm_vcpu *vcpu);
> -u64 get_pvm_id_aa64dfr1(const struct kvm_vcpu *vcpu);
> -u64 get_pvm_id_aa64afr0(const struct kvm_vcpu *vcpu);
> -u64 get_pvm_id_aa64afr1(const struct kvm_vcpu *vcpu);
> -u64 get_pvm_id_aa64isar0(const struct kvm_vcpu *vcpu);
> -u64 get_pvm_id_aa64isar1(const struct kvm_vcpu *vcpu);
> -u64 get_pvm_id_aa64mmfr0(const struct kvm_vcpu *vcpu);
> -u64 get_pvm_id_aa64mmfr1(const struct kvm_vcpu *vcpu);
> -u64 get_pvm_id_aa64mmfr2(const struct kvm_vcpu *vcpu);
This is nice.
> -
> +u64 pvm_read_id_reg(const struct kvm_vcpu *vcpu, u32 id);
> bool kvm_handle_pvm_sysreg(struct kvm_vcpu *vcpu, u64 *exit_code);
> int kvm_check_pvm_sysreg_table(void);
> void inject_undef64(struct kvm_vcpu *vcpu);
> diff --git a/arch/arm64/kvm/hyp/nvhe/pkvm.c b/arch/arm64/kvm/hyp/nvhe/pkvm.c
> index 633547cc1033..62377fa8a4cb 100644
> --- a/arch/arm64/kvm/hyp/nvhe/pkvm.c
> +++ b/arch/arm64/kvm/hyp/nvhe/pkvm.c
> @@ -15,7 +15,7 @@
> */
> static void pvm_init_traps_aa64pfr0(struct kvm_vcpu *vcpu)
> {
> - const u64 feature_ids = get_pvm_id_aa64pfr0(vcpu);
> + const u64 feature_ids = pvm_read_id_reg(vcpu, SYS_ID_AA64PFR0_EL1);
> u64 hcr_set = HCR_RW;
> u64 hcr_clear = 0;
> u64 cptr_set = 0;
> @@ -62,7 +62,7 @@ static void pvm_init_traps_aa64pfr0(struct kvm_vcpu *vcpu)
> */
> static void pvm_init_traps_aa64pfr1(struct kvm_vcpu *vcpu)
> {
> - const u64 feature_ids = get_pvm_id_aa64pfr1(vcpu);
> + const u64 feature_ids = pvm_read_id_reg(vcpu, SYS_ID_AA64PFR1_EL1);
> u64 hcr_set = 0;
> u64 hcr_clear = 0;
>
> @@ -81,7 +81,7 @@ static void pvm_init_traps_aa64pfr1(struct kvm_vcpu *vcpu)
> */
> static void pvm_init_traps_aa64dfr0(struct kvm_vcpu *vcpu)
> {
> - const u64 feature_ids = get_pvm_id_aa64dfr0(vcpu);
> + const u64 feature_ids = pvm_read_id_reg(vcpu, SYS_ID_AA64DFR0_EL1);
> u64 mdcr_set = 0;
> u64 mdcr_clear = 0;
> u64 cptr_set = 0;
> @@ -125,7 +125,7 @@ static void pvm_init_traps_aa64dfr0(struct kvm_vcpu *vcpu)
> */
> static void pvm_init_traps_aa64mmfr0(struct kvm_vcpu *vcpu)
> {
> - const u64 feature_ids = get_pvm_id_aa64mmfr0(vcpu);
> + const u64 feature_ids = pvm_read_id_reg(vcpu, SYS_ID_AA64MMFR0_EL1);
> u64 mdcr_set = 0;
>
> /* Trap Debug Communications Channel registers */
> @@ -140,7 +140,7 @@ static void pvm_init_traps_aa64mmfr0(struct kvm_vcpu *vcpu)
> */
> static void pvm_init_traps_aa64mmfr1(struct kvm_vcpu *vcpu)
> {
> - const u64 feature_ids = get_pvm_id_aa64mmfr1(vcpu);
> + const u64 feature_ids = pvm_read_id_reg(vcpu, SYS_ID_AA64MMFR1_EL1);
> u64 hcr_set = 0;
>
> /* Trap LOR */
> diff --git a/arch/arm64/kvm/hyp/nvhe/sys_regs.c b/arch/arm64/kvm/hyp/nvhe/sys_regs.c
> index 6bde2dc5205c..f125d6a52880 100644
> --- a/arch/arm64/kvm/hyp/nvhe/sys_regs.c
> +++ b/arch/arm64/kvm/hyp/nvhe/sys_regs.c
> @@ -82,7 +82,7 @@ static u64 get_restricted_features_unsigned(u64 sys_reg_val,
> * based on allowed features, system features, and KVM support.
> */
>
> -u64 get_pvm_id_aa64pfr0(const struct kvm_vcpu *vcpu)
> +static u64 get_pvm_id_aa64pfr0(const struct kvm_vcpu *vcpu)
> {
> const struct kvm *kvm = (const struct kvm *)kern_hyp_va(vcpu->kvm);
> u64 set_mask = 0;
> @@ -103,7 +103,7 @@ u64 get_pvm_id_aa64pfr0(const struct kvm_vcpu *vcpu)
> return (id_aa64pfr0_el1_sys_val & allow_mask) | set_mask;
> }
>
> -u64 get_pvm_id_aa64pfr1(const struct kvm_vcpu *vcpu)
> +static u64 get_pvm_id_aa64pfr1(const struct kvm_vcpu *vcpu)
> {
> const struct kvm *kvm = (const struct kvm *)kern_hyp_va(vcpu->kvm);
> u64 allow_mask = PVM_ID_AA64PFR1_ALLOW;
> @@ -114,7 +114,7 @@ u64 get_pvm_id_aa64pfr1(const struct kvm_vcpu *vcpu)
> return id_aa64pfr1_el1_sys_val & allow_mask;
> }
>
> -u64 get_pvm_id_aa64zfr0(const struct kvm_vcpu *vcpu)
> +static u64 get_pvm_id_aa64zfr0(const struct kvm_vcpu *vcpu)
> {
> /*
> * No support for Scalable Vectors, therefore, hyp has no sanitized
> @@ -124,7 +124,7 @@ u64 get_pvm_id_aa64zfr0(const struct kvm_vcpu *vcpu)
> return 0;
> }
>
> -u64 get_pvm_id_aa64dfr0(const struct kvm_vcpu *vcpu)
> +static u64 get_pvm_id_aa64dfr0(const struct kvm_vcpu *vcpu)
> {
> /*
> * No support for debug, including breakpoints, and watchpoints,
> @@ -134,7 +134,7 @@ u64 get_pvm_id_aa64dfr0(const struct kvm_vcpu *vcpu)
> return 0;
> }
>
> -u64 get_pvm_id_aa64dfr1(const struct kvm_vcpu *vcpu)
> +static u64 get_pvm_id_aa64dfr1(const struct kvm_vcpu *vcpu)
> {
> /*
> * No support for debug, therefore, hyp has no sanitized copy of the
> @@ -144,7 +144,7 @@ u64 get_pvm_id_aa64dfr1(const struct kvm_vcpu *vcpu)
> return 0;
> }
>
> -u64 get_pvm_id_aa64afr0(const struct kvm_vcpu *vcpu)
> +static u64 get_pvm_id_aa64afr0(const struct kvm_vcpu *vcpu)
> {
> /*
> * No support for implementation defined features, therefore, hyp has no
> @@ -154,7 +154,7 @@ u64 get_pvm_id_aa64afr0(const struct kvm_vcpu *vcpu)
> return 0;
> }
>
> -u64 get_pvm_id_aa64afr1(const struct kvm_vcpu *vcpu)
> +static u64 get_pvm_id_aa64afr1(const struct kvm_vcpu *vcpu)
> {
> /*
> * No support for implementation defined features, therefore, hyp has no
> @@ -164,12 +164,12 @@ u64 get_pvm_id_aa64afr1(const struct kvm_vcpu *vcpu)
> return 0;
> }
>
> -u64 get_pvm_id_aa64isar0(const struct kvm_vcpu *vcpu)
> +static u64 get_pvm_id_aa64isar0(const struct kvm_vcpu *vcpu)
> {
> return id_aa64isar0_el1_sys_val & PVM_ID_AA64ISAR0_ALLOW;
> }
>
> -u64 get_pvm_id_aa64isar1(const struct kvm_vcpu *vcpu)
> +static u64 get_pvm_id_aa64isar1(const struct kvm_vcpu *vcpu)
> {
> u64 allow_mask = PVM_ID_AA64ISAR1_ALLOW;
>
> @@ -182,7 +182,7 @@ u64 get_pvm_id_aa64isar1(const struct kvm_vcpu *vcpu)
> return id_aa64isar1_el1_sys_val & allow_mask;
> }
>
> -u64 get_pvm_id_aa64mmfr0(const struct kvm_vcpu *vcpu)
> +static u64 get_pvm_id_aa64mmfr0(const struct kvm_vcpu *vcpu)
> {
> u64 set_mask;
>
> @@ -192,22 +192,19 @@ u64 get_pvm_id_aa64mmfr0(const struct kvm_vcpu *vcpu)
> return (id_aa64mmfr0_el1_sys_val & PVM_ID_AA64MMFR0_ALLOW) | set_mask;
> }
>
> -u64 get_pvm_id_aa64mmfr1(const struct kvm_vcpu *vcpu)
> +static u64 get_pvm_id_aa64mmfr1(const struct kvm_vcpu *vcpu)
> {
> return id_aa64mmfr1_el1_sys_val & PVM_ID_AA64MMFR1_ALLOW;
> }
>
> -u64 get_pvm_id_aa64mmfr2(const struct kvm_vcpu *vcpu)
> +static u64 get_pvm_id_aa64mmfr2(const struct kvm_vcpu *vcpu)
> {
> return id_aa64mmfr2_el1_sys_val & PVM_ID_AA64MMFR2_ALLOW;
> }
>
> -/* Read a sanitized cpufeature ID register by its sys_reg_desc. */
> -static u64 read_id_reg(const struct kvm_vcpu *vcpu,
> - struct sys_reg_desc const *r)
> +/* Read a sanitized cpufeature ID register by its encoding */
> +u64 pvm_read_id_reg(const struct kvm_vcpu *vcpu, u32 id)
> {
> - u32 id = reg_to_encoding(r);
> -
> switch (id) {
> case SYS_ID_AA64PFR0_EL1:
> return get_pvm_id_aa64pfr0(vcpu);
> @@ -245,6 +242,12 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu,
> return 0;
> }
>
> +static u64 read_id_reg(const struct kvm_vcpu *vcpu,
> + struct sys_reg_desc const *r)
> +{
> + return pvm_read_id_reg(vcpu, reg_to_encoding(r));
> +}
> +
> /*
> * Accessor for AArch32 feature id registers.
> *
> --
> 2.30.2
>
Reviewed-by: Andrew Jones <drjones@redhat.com>
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next prev parent reply other threads:[~2021-10-14 9:06 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-10 14:56 [PATCH v8 00/11] KVM: arm64: Fixed features for protected VMs Fuad Tabba
2021-10-10 14:56 ` [PATCH v8 01/11] KVM: arm64: Move __get_fault_info() and co into their own include file Fuad Tabba
2021-10-10 14:56 ` [PATCH v8 02/11] KVM: arm64: Don't include switch.h into nvhe/kvm-main.c Fuad Tabba
2021-10-10 14:56 ` [PATCH v8 03/11] KVM: arm64: Move early handlers to per-EC handlers Fuad Tabba
2021-10-10 14:56 ` [PATCH v8 04/11] KVM: arm64: Pass struct kvm " Fuad Tabba
2021-10-10 14:56 ` [PATCH v8 05/11] KVM: arm64: Add missing field descriptor for MDCR_EL2 Fuad Tabba
2021-10-10 14:56 ` [PATCH v8 06/11] KVM: arm64: Simplify masking out MTE in feature id reg Fuad Tabba
2021-10-10 14:56 ` [PATCH v8 07/11] KVM: arm64: Add handlers for protected VM System Registers Fuad Tabba
2021-10-11 11:39 ` Marc Zyngier
2021-10-11 11:52 ` Fuad Tabba
2021-10-10 14:56 ` [PATCH v8 08/11] KVM: arm64: Initialize trap registers for protected VMs Fuad Tabba
2021-10-10 14:56 ` [PATCH v8 09/11] KVM: arm64: Move sanitized copies of CPU features Fuad Tabba
2021-10-10 14:56 ` [PATCH v8 10/11] KVM: arm64: Trap access to pVM restricted features Fuad Tabba
2021-10-10 14:56 ` [PATCH v8 11/11] KVM: arm64: Handle protected guests at 32 bits Fuad Tabba
2021-10-11 13:11 ` Marc Zyngier
2021-10-11 13:36 ` Fuad Tabba
2021-10-13 12:03 ` [PATCH v9 00/22] KVM: arm64: Fixed features for protected VMs Marc Zyngier
2021-10-13 12:03 ` [PATCH v9 12/22] KVM: arm64: Fix early exit ptrauth handling Marc Zyngier
2021-10-13 12:03 ` [PATCH v9 13/22] KVM: arm64: pkvm: Use a single function to expose all id-regs Marc Zyngier
2021-10-14 9:04 ` Andrew Jones [this message]
2021-10-13 12:03 ` [PATCH v9 14/22] KVM: arm64: pkvm: Make the ERR/ERX*_EL1 registers RAZ/WI Marc Zyngier
2021-10-14 9:32 ` Andrew Jones
2021-10-14 16:09 ` Marc Zyngier
2021-10-14 16:20 ` Andrew Jones
2021-10-13 12:03 ` [PATCH v9 15/22] KVM: arm64: pkvm: Drop AArch32-specific registers Marc Zyngier
2021-10-14 9:33 ` Andrew Jones
2021-10-13 12:03 ` [PATCH v9 16/22] KVM: arm64: pkvm: Drop sysregs that should never be routed to the host Marc Zyngier
2021-10-13 12:03 ` [PATCH v9 17/22] KVM: arm64: pkvm: Handle GICv3 traps as required Marc Zyngier
2021-10-14 9:46 ` Andrew Jones
2021-10-14 16:06 ` Marc Zyngier
2021-10-13 12:03 ` [PATCH v9 18/22] KVM: arm64: pkvm: Preserve pending SError on exit from AArch32 Marc Zyngier
2021-10-13 12:03 ` [PATCH v9 19/22] KVM: arm64: pkvm: Consolidate include files Marc Zyngier
2021-10-13 12:03 ` [PATCH v9 20/22] KVM: arm64: pkvm: Move kvm_handle_pvm_restricted around Marc Zyngier
2021-10-13 12:03 ` [PATCH v9 21/22] KVM: arm64: pkvm: Pass vpcu instead of kvm to kvm_get_exit_handler_array() Marc Zyngier
2021-10-13 12:03 ` [PATCH v9 22/22] KVM: arm64: pkvm: Give priority to standard traps over pvm handling Marc Zyngier
2021-10-18 9:51 ` [PATCH v9 00/22] KVM: arm64: Fixed features for protected VMs Fuad Tabba
2021-10-18 10:45 ` Andrew Jones
2021-10-18 12:33 ` Fuad Tabba
2021-10-18 16:37 ` Marc Zyngier
2021-10-18 16:39 ` [PATCH v8 00/11] " Marc Zyngier
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