From: Daniel Machon <daniel.machon@microchip.com>
To: <netdev@vger.kernel.org>
Cc: <davem@davemloft.net>, <petrm@nvidia.com>,
<maxime.chevallier@bootlin.com>, <thomas.petazzoni@bootlin.com>,
<edumazet@google.com>, <kuba@kernel.org>, <pabeni@redhat.com>,
<lars.povlsen@microchip.com>, <Steen.Hegelund@microchip.com>,
<daniel.machon@microchip.com>, <UNGLinuxDriver@microchip.com>,
<joe@perches.com>, <linux@armlinux.org.uk>,
<horatiu.vultur@microchip.com>, <Julia.Lawall@inria.fr>,
<vladimir.oltean@nxp.com>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH net-next v2 6/6] net: microchip: sparx5: add support for offloading default prio
Date: Thu, 29 Sep 2022 20:52:07 +0200 [thread overview]
Message-ID: <20220929185207.2183473-7-daniel.machon@microchip.com> (raw)
In-Reply-To: <20220929185207.2183473-1-daniel.machon@microchip.com>
Add support for offloading default prio {ETHERTYPE, 0, prio}.
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
---
.../ethernet/microchip/sparx5/sparx5_dcb.c | 12 ++++++++++
.../ethernet/microchip/sparx5/sparx5_port.c | 23 +++++++++++++++++++
.../ethernet/microchip/sparx5/sparx5_port.h | 5 ++++
3 files changed, 40 insertions(+)
diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_dcb.c b/drivers/net/ethernet/microchip/sparx5/sparx5_dcb.c
index 0cc46672b59c..50df24972643 100644
--- a/drivers/net/ethernet/microchip/sparx5/sparx5_dcb.c
+++ b/drivers/net/ethernet/microchip/sparx5/sparx5_dcb.c
@@ -34,6 +34,13 @@ static int sparx5_dcb_app_validate(struct net_device *dev,
int err = 0;
switch (app->selector) {
+ /* Default priority checks */
+ case IEEE_8021QAZ_APP_SEL_ETHERTYPE:
+ if (app->protocol != 0)
+ err = -EINVAL;
+ else if (app->priority >= SPX5_PRIOS)
+ err = -ERANGE;
+ break;
/* Dscp checks */
case IEEE_8021QAZ_APP_SEL_DSCP:
if (app->protocol > 63)
@@ -119,6 +126,11 @@ static int sparx5_dcb_app_update(struct net_device *dev)
dscp_map = &qos.dscp.map;
pcp_map = &qos.pcp.map;
+ /* Get default prio. */
+ qos.default_prio = dcb_ieee_getapp_default_prio_mask(dev);
+ if (qos.default_prio)
+ qos.default_prio = fls(qos.default_prio) - 1;
+
/* Get dscp ingress mapping */
dcb_ieee_getapp_dscp_prio_mask_map(dev, dscp_map);
for (i = 0; i < ARRAY_SIZE(dscp_map->map); i++)
diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c
index fb5e321c4896..73ebe76d7e50 100644
--- a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c
+++ b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c
@@ -1151,6 +1151,7 @@ int sparx5_port_qos_set(struct sparx5_port *port,
{
sparx5_port_qos_dscp_set(port, &qos->dscp);
sparx5_port_qos_pcp_set(port, &qos->pcp);
+ sparx5_port_qos_default_set(port, qos);
return 0;
}
@@ -1220,3 +1221,25 @@ int sparx5_port_qos_dscp_set(const struct sparx5_port *port,
return 0;
}
+
+int sparx5_port_qos_default_set(const struct sparx5_port *port,
+ const struct sparx5_port_qos *qos)
+{
+ struct sparx5 *sparx5 = port->sparx5;
+
+ /* Set default prio and dp level */
+ spx5_rmw(ANA_CL_QOS_CFG_DEFAULT_QOS_VAL_SET(qos->default_prio) |
+ ANA_CL_QOS_CFG_DEFAULT_DP_VAL_SET(0),
+ ANA_CL_QOS_CFG_DEFAULT_QOS_VAL |
+ ANA_CL_QOS_CFG_DEFAULT_DP_VAL,
+ sparx5, ANA_CL_QOS_CFG(port->portno));
+
+ /* Set default pcp and dei for untagged frames */
+ spx5_rmw(ANA_CL_VLAN_CTRL_PORT_PCP_SET(0) |
+ ANA_CL_VLAN_CTRL_PORT_DEI_SET(0),
+ ANA_CL_VLAN_CTRL_PORT_PCP |
+ ANA_CL_VLAN_CTRL_PORT_DEI,
+ sparx5, ANA_CL_VLAN_CTRL(port->portno));
+
+ return 0;
+}
diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_port.h b/drivers/net/ethernet/microchip/sparx5/sparx5_port.h
index 00def02455a7..698d7d5a5c4e 100644
--- a/drivers/net/ethernet/microchip/sparx5/sparx5_port.h
+++ b/drivers/net/ethernet/microchip/sparx5/sparx5_port.h
@@ -110,6 +110,7 @@ struct sparx5_port_qos_dscp {
struct sparx5_port_qos {
struct sparx5_port_qos_pcp pcp;
struct sparx5_port_qos_dscp dscp;
+ u8 default_prio;
};
int sparx5_port_qos_set(struct sparx5_port *port, struct sparx5_port_qos *qos);
@@ -119,4 +120,8 @@ int sparx5_port_qos_pcp_set(const struct sparx5_port *port,
int sparx5_port_qos_dscp_set(const struct sparx5_port *port,
struct sparx5_port_qos_dscp *qos);
+
+int sparx5_port_qos_default_set(const struct sparx5_port *port,
+ const struct sparx5_port_qos *qos);
+
#endif /* __SPARX5_PORT_H__ */
--
2.34.1
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prev parent reply other threads:[~2022-09-29 18:45 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-29 18:52 [PATCH net-next v2 0/6] Add new PCP and APPTRUST attributes to dcbnl Daniel Machon
2022-09-29 18:52 ` [PATCH net-next v2 1/6] net: dcb: add new pcp selector to app object Daniel Machon
2022-09-30 12:20 ` Petr Machata
2022-09-30 15:41 ` Petr Machata
2022-10-01 0:54 ` Jakub Kicinski
2022-10-03 7:52 ` Petr Machata
2022-10-03 16:25 ` Jakub Kicinski
2022-10-03 21:59 ` Daniel.Machon
2022-10-03 23:34 ` Jakub Kicinski
2022-10-04 10:56 ` Petr Machata
2022-10-04 10:20 ` Petr Machata
2022-10-04 10:52 ` Petr Machata
2022-10-04 19:51 ` Jakub Kicinski
2022-10-03 6:48 ` Daniel.Machon
2022-10-03 8:22 ` Petr Machata
2022-10-03 9:33 ` Daniel.Machon
2022-10-05 10:09 ` Petr Machata
2022-09-29 18:52 ` [PATCH net-next v2 2/6] net: dcb: add new apptrust attribute Daniel Machon
2022-09-30 13:03 ` Petr Machata
2022-09-29 18:52 ` [PATCH net-next v2 3/6] net: microchip: sparx5: add support for offloading pcp table Daniel Machon
2022-09-29 18:52 ` [PATCH net-next v2 4/6] net: microchip: sparx5: add support for apptrust Daniel Machon
2022-09-30 15:49 ` Petr Machata
2022-10-03 6:52 ` Daniel.Machon
2022-10-03 8:01 ` Petr Machata
2022-10-03 8:17 ` Daniel.Machon
2022-10-03 9:34 ` Petr Machata
2022-09-29 18:52 ` [PATCH net-next v2 5/6] net: microchip: sparx5: add support for offloading dscp table Daniel Machon
2022-09-29 18:52 ` Daniel Machon [this message]
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