From: Nicolas Ferre <nicolas.ferre@microchip.com>
To: Claudiu Beznea <claudiu.beznea@microchip.com>,
<mturquette@baylibre.com>, <sboyd@kernel.org>,
<alexandre.belloni@bootlin.com>,
<ludovic.desroches@microchip.com>
Cc: <linux-clk@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v5 10/15] clk: at91: clk-master: fix prescaler logic
Date: Fri, 15 Oct 2021 09:58:34 +0200 [thread overview]
Message-ID: <220aaf60-0ee1-97d1-6b65-eb3b57ddab10@microchip.com> (raw)
In-Reply-To: <20211011112719.3951784-11-claudiu.beznea@microchip.com>
On 11/10/2021 at 13:27, Claudiu Beznea wrote:
> When prescaler value read from register is MASTER_PRES_MAX it means
> that the input clock will be divided by 3. Fix the code to reflect
> this.
>
> Fixes: 7a110b9107ed8 ("clk: at91: clk-master: re-factor master clock")
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> ---
> drivers/clk/at91/clk-master.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c
> index 6da9ae34313a..e67bcd03a827 100644
> --- a/drivers/clk/at91/clk-master.c
> +++ b/drivers/clk/at91/clk-master.c
> @@ -386,7 +386,7 @@ static unsigned long clk_master_pres_recalc_rate(struct clk_hw *hw,
>
> val &= master->layout->mask;
> pres = (val >> master->layout->pres_shift) & MASTER_PRES_MASK;
> - if (pres == 3 && characteristics->have_div3_pres)
> + if (pres == MASTER_PRES_MAX && characteristics->have_div3_pres)
> pres = 3;
> else
> pres = (1 << pres);
>
--
Nicolas Ferre
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-10-15 8:05 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-11 11:27 [PATCH v5 00/15] clk: at91: updates for power management and dvfs Claudiu Beznea
2021-10-11 11:27 ` [PATCH v5 01/15] clk: at91: re-factor clocks suspend/resume Claudiu Beznea
2021-10-15 7:46 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 02/15] clk: at91: pmc: execute suspend/resume only for backup mode Claudiu Beznea
2021-10-15 7:51 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 03/15] clk: at91: sama7g5: add securam's peripheral clock Claudiu Beznea
2021-10-11 11:27 ` [PATCH v5 04/15] clk: at91: clk-master: add register definition for sama7g5's master clock Claudiu Beznea
2021-10-15 7:52 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 05/15] clk: at91: clk-master: improve readability by using local variables Claudiu Beznea
2021-10-15 7:53 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 06/15] clk: at91: pmc: add sama7g5 to the list of available pmcs Claudiu Beznea
2021-10-15 7:54 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 07/15] clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL Claudiu Beznea
2021-10-15 7:54 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 08/15] clk: at91: clk-master: check if div or pres is zero Claudiu Beznea
2021-10-15 7:55 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 09/15] clk: at91: clk-master: mask mckr against layout->mask Claudiu Beznea
2021-10-15 7:56 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 10/15] clk: at91: clk-master: fix prescaler logic Claudiu Beznea
2021-10-15 7:58 ` Nicolas Ferre [this message]
2021-10-11 11:27 ` [PATCH v5 11/15] clk: at91: clk-sam9x60-pll: add notifier for div part of PLL Claudiu Beznea
2021-10-15 8:01 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 12/15] clk: at91: clk-master: add notifier for divider Claudiu Beznea
2021-10-15 8:06 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 13/15] clk: at91: sama7g5: remove prescaler part of master clock Claudiu Beznea
2021-10-15 8:07 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 14/15] clk: at91: sama7g5: set low limit for mck0 at 32KHz Claudiu Beznea
2021-10-15 8:07 ` Nicolas Ferre
2021-10-11 11:27 ` [PATCH v5 15/15] clk: use clk_core_get_rate_recalc() in clk_rate_get() Claudiu Beznea
2021-10-15 8:08 ` Nicolas Ferre
2021-10-27 1:26 ` Stephen Boyd
2021-10-27 7:01 ` Claudiu.Beznea
2021-10-15 8:33 ` [PATCH v5 00/15] clk: at91: updates for power management and dvfs Nicolas Ferre
2021-10-27 1:35 ` Stephen Boyd
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=220aaf60-0ee1-97d1-6b65-eb3b57ddab10@microchip.com \
--to=nicolas.ferre@microchip.com \
--cc=alexandre.belloni@bootlin.com \
--cc=claudiu.beznea@microchip.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=ludovic.desroches@microchip.com \
--cc=mturquette@baylibre.com \
--cc=sboyd@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).