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Tue, 19 Mar 2019 07:44:53 -0500 Received: from DFLE106.ent.ti.com (10.64.6.27) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Tue, 19 Mar 2019 07:44:53 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1713.5 via Frontend Transport; Tue, 19 Mar 2019 07:44:53 -0500 Received: from [172.24.190.117] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x2JCinNv002828; Tue, 19 Mar 2019 07:44:49 -0500 Subject: Re: [PATCH v5 06/10] irqchip: ti-sci-intr: Add support for Interrupt Router driver From: Lokesh Vutla To: Marc Zyngier References: <20190212074237.2875-1-lokeshvutla@ti.com> <20190212074237.2875-7-lokeshvutla@ti.com> <20190218155217.5195f118@why.wild-wind.fr.eu.org> <1c2f2610-2be4-c145-4786-eabf3a07bc47@ti.com> Message-ID: <799cd61d-e73b-d979-f5e0-9f4ce1de7d03@ti.com> Date: Tue, 19 Mar 2019 18:14:27 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: <1c2f2610-2be4-c145-4786-eabf3a07bc47@ti.com> Content-Language: en-US X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190319_054510_520054_6B1D6AAD X-CRM114-Status: GOOD ( 14.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nishanth Menon , Device Tree Mailing List , jason@lakedaemon.net, Tony Lindgren , Tero Kristo , Sekhar Nori , linux-kernel@vger.kernel.org, Peter Ujfalusi , Rob Herring , Santosh Shilimkar , tglx@linutronix.de, Linux ARM Mailing List Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Marc, [..snip..] > >> suggested to investigate the x86 two phase allocation mechanism for the >> INTA driver. > > Sorry, Ill try to explore this path. Any pointers to the doc/code will be really > helpful :) I have been trying hard to get some information on this for past few days but I can't find anything in kernel. Can you point me to some doc/code for the x86 two phase allocation of irqs? Thanks and regards, Lokesh _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel