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From: Raphael Gault <raphael.gault@arm.com>
To: Mark Rutland <mark.rutland@arm.com>
Cc: raph.gault+kdev@gmail.com, peterz@infradead.org,
	catalin.marinas@arm.com, will.deacon@arm.com,
	linux-kernel@vger.kernel.org, acme@kernel.org, mingo@redhat.com,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 2/5] arm64: cpufeature: Add feature to detect heterogeneous systems
Date: Tue, 20 Aug 2019 16:55:24 +0100	[thread overview]
Message-ID: <8cf12008-cc86-3872-7358-2e837cf2498a@arm.com> (raw)
In-Reply-To: <20190820154955.GB43412@lakrids.cambridge.arm.com>

Hi Mark,

Thank you for your comments.

On 8/20/19 4:49 PM, Mark Rutland wrote:
> On Tue, Aug 20, 2019 at 04:23:17PM +0100, Mark Rutland wrote:
>> Hi Raphael,
>>
>> On Fri, Aug 16, 2019 at 01:59:31PM +0100, Raphael Gault wrote:
>>> This feature is required in order to enable PMU counters direct
>>> access from userspace only when the system is homogeneous.
>>> This feature checks the model of each CPU brought online and compares it
>>> to the boot CPU. If it differs then it is heterogeneous.
>>
>> It would be worth noting that this patch prevents heterogeneous CPUs
>> being brought online late if the system was uniform at boot time.
> 
> Looking again, I think I'd misunderstood how
> ARM64_CPUCAP_OPTIONAL_FOR_LATE_CPU was dealt with, but we do have a
> problem in this area.
> 
> [...]
> 
>>
>>> +		.capability = ARM64_HAS_HETEROGENEOUS_PMU,
>>> +		.type = ARM64_CPUCAP_SCOPE_LOCAL_CPU | ARM64_CPUCAP_OPTIONAL_FOR_LATE_CPU,
>>> +		.matches = has_heterogeneous_pmu,
>>> +	},
> 
> I had a quick chat with Will, and we concluded that we must permit late
> onlining of heterogeneous CPUs here as people are likely to rely on
> late CPU onlining on some heterogeneous systems.
> 
> I think the above permits that, but that also means that we need some
> support code to fail gracefully in that case (e.g. without sending
> a SIGILL to unaware userspace code).

I understand, however, I understood that 
ARM64_CPUCAP_OPTIONAL_FOR_LATE_CPU did not allow later CPU to be 
heterogeneous if the capability wasn't already enabled. Thus if as you 
say we need to allow the system to switch from homogeneous to 
heterogeneous, then I should change the type of this capability.

> That means that we'll need the counter emulation code that you had in
> previous versions of this patch (e.g. to handle potential UNDEFs when a
> new CPU has fewer counters than the previously online CPUs).
> 
> Further, I think the context switch (and event index) code needs to take
> this cap into account, and disable direct access once the system becomes
> heterogeneous.

That is a good point indeed.

Thanks,

-- 
Raphael Gault

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  reply	other threads:[~2019-08-20 15:55 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-16 12:59 [PATCH v3 0/5] arm64: Enable access to pmu registers by user-space Raphael Gault
2019-08-16 12:59 ` [PATCH v3 1/5] perf: arm64: Add test to check userspace access to hardware counters Raphael Gault
2019-08-16 12:59 ` [PATCH v3 2/5] arm64: cpufeature: Add feature to detect heterogeneous systems Raphael Gault
2019-08-20 15:23   ` Mark Rutland
2019-08-20 15:49     ` Mark Rutland
2019-08-20 15:55       ` Raphael Gault [this message]
2019-08-20 16:03         ` Mark Rutland
2019-08-16 12:59 ` [PATCH v3 3/5] arm64: pmu: Add function implementation to update event index in userpage Raphael Gault
2019-08-20 15:34   ` Mark Rutland
2019-08-16 12:59 ` [PATCH v3 4/5] arm64: perf: Enable pmu counter direct access for perf event on armv8 Raphael Gault
2019-08-18 12:37   ` kbuild test robot
2019-08-19  7:59     ` Raphael Gault
2019-08-20  6:49       ` [kbuild-all] " Philip Li
2019-08-16 12:59 ` [PATCH v3 5/5] Documentation: arm64: Document PMU counters access from userspace Raphael Gault

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