From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.7 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1F0ADC4338F for ; Fri, 6 Aug 2021 12:46:01 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B56EB61050 for ; Fri, 6 Aug 2021 12:46:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org B56EB61050 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=AgpARiWlwMjst64Tu4bUAGQA2Dd76T/ChcnGKQWT2PM=; b=rrX1A39IbhdG63 uBd3i6zqLiNJFbVC5i6WAAQ6xz+i/FyTdH0d3hz4y3IUzFDl5RQtWeMBqoj4MdnhbOHEibDt0ESw7 aICyH/dCu+cafV2FLOQyfi5FbhGvtsIsQqcI7Kb5JtHvkjmWCmRebm7qZtmMYAerEqFDY62J3mZN0 AFgYnckk7JuQckxUz3Lq/5w/8Iy6nvhqMHBfRHi998adHH9B4+EQT4Pgew4ef8fvU1Xcax4J1Qrdh 3CjjcV5Jg1aHqlP5nVTk8KY/03bEOa9bAIXvp4ujxr7vaOot7/M1ULmw/CrQqWfwE4ZBfLHltJKkj Ww0YcWwerbMAmF/IexsQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mBzD8-00CUtA-CH; Fri, 06 Aug 2021 12:44:26 +0000 Received: from mail-lj1-x22e.google.com ([2a00:1450:4864:20::22e]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mBzD4-00CUs5-Bn for linux-arm-kernel@lists.infradead.org; Fri, 06 Aug 2021 12:44:23 +0000 Received: by mail-lj1-x22e.google.com with SMTP id m9so11738683ljp.7 for ; Fri, 06 Aug 2021 05:44:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=AUGZghFDl11vs00dn1bBhuFfeam16nyG6Ia09ASLgZs=; b=Tn0SdedHjL8I2aKCvPSfOmnmBwXw8vTE0CtlDMTiP4CidYwjaChJwhKhyt2Qd/FO+g UNTviRBd+PWByGSsuafxHFown5psNKCm/aGF1y700SAnmIryqlYGfeTPOtTO2mYSZIKb ek5EmHa4RPVNeBM6k9n5y/HZ899fvQ0L8V9LhbwIIUvT+mtIF0iy0SgW9E57Gi61J8+Z AykVPNP/IsKcFYAhWji4xE2feOtFH2fQBVGywMA1R6DIoEdCmMMsbMCb/uOBNuvpAOtI xtn6vkB2vXZwQ7P9vfPQAB79eDq2LzRAcf9zaDbzA1VuIsg2d+rbf35/OkFCV5qeXbCm +68A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=AUGZghFDl11vs00dn1bBhuFfeam16nyG6Ia09ASLgZs=; b=M4xCBLkFgLSSz9z362eCCUYpv1XHYIU95bnp1mEeQ3ywmV1shndgyZUJ4lQv589WOe 9wHbEzunDoWtBfAOIzDGrxknB/MJ2qs4J4NpNJ8VVxUULygr9WyEICwIo/1tpKHCFLCn POmuvkwigolzkOiZEtyH2e9zBKohUaOlZWXtqbf6y5Q2gcovCWJIWGQDESRsQUcaZ+6I BD35+LdLeTjW+UEf7HSmSUgZ1TAPw+VxA7XRu29YjoPZPHCpaEEx/ogqeIMRTuIoX1C7 sDYOUHhcnqV9EfbQl19FJcD1q7wBhH5Z6Sa0LmJ4XQ/C/PGLikFM2f/hoimCS6b9KzfM 7Xkw== X-Gm-Message-State: AOAM530CavVe84uAYUYGTYFpAX/uATW/UID9mPB17/Tuw11/gBZ8pDJN i237vuE7VBKue7WRm13GBrU/fOZMyMhpyGPdQ5o= X-Google-Smtp-Source: ABdhPJyw9UQdg2wcTF6X6YqWYALeU15zPaIeekDTsntEglCxKQbhjNwgbNs8ElgLyi66gGTX5Dv7Dw2Okzt7g1N24y8= X-Received: by 2002:a05:651c:b10:: with SMTP id b16mr6674355ljr.35.1628253858084; Fri, 06 Aug 2021 05:44:18 -0700 (PDT) MIME-Version: 1.0 References: <20210728135217.591173-1-suzuki.poulose@arm.com> <20210728135217.591173-8-suzuki.poulose@arm.com> In-Reply-To: <20210728135217.591173-8-suzuki.poulose@arm.com> From: Linu Cherian Date: Fri, 6 Aug 2021 18:14:06 +0530 Message-ID: Subject: Re: [PATCH 07/10] arm64: Add erratum detection for TRBE overwrite in FILL mode To: Suzuki K Poulose Cc: linux-arm-kernel , Mark Rutland , maz@kernel.org, Anshuman Khandual , catalin.marinas@arm.com, Coresight ML , linux-kernel@vger.kernel.org, james.morse@arm.com, Will Deacon , Mike Leach , Linu Cherian X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210806_054422_451480_84F76E11 X-CRM114-Status: GOOD ( 30.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Suzuki, On Wed, Jul 28, 2021 at 7:23 PM Suzuki K Poulose wrote: > > Arm Neoverse-N2 and the Cortex-A710 cores are affected > by a CPU erratum where the TRBE will overwrite the trace buffer > in FILL mode. The TRBE doesn't stop (as expected in FILL mode) > when it reaches the limit and wraps to the base to continue > writing upto 3 cache lines. This will overwrite any trace that > was written previously. > > Add the Neoverse-N2 erratumi(#2139208) and Cortex-A710 erratum > (#2119858) to the detection logic. > > This will be used by the TRBE driver in later patches to work > around the issue. The detection has been kept with the core > arm64 errata framework list to make sure : > - We don't duplicate the framework in TRBE driver > - The errata detection is advertised like the rest > of the CPU errata. > > Note that the Kconfig entries will be added after we have added > the work around in the TRBE driver, which depends on the cpucap > from here. > > Cc: Will Deacon > Cc: Mark Rutland > Cc: Anshuman Khandual > Cc: Catalin Marinas > Cc: Mathieu Poirier > Cc: Mike Leach > cc: Leo Yan > Signed-off-by: Suzuki K Poulose > --- > arch/arm64/kernel/cpu_errata.c | 25 +++++++++++++++++++++++++ > arch/arm64/tools/cpucaps | 1 + > 2 files changed, 26 insertions(+) > > diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c > index e2c20c036442..ccd757373f36 100644 > --- a/arch/arm64/kernel/cpu_errata.c > +++ b/arch/arm64/kernel/cpu_errata.c > @@ -340,6 +340,18 @@ static const struct midr_range erratum_1463225[] = { > }; > #endif > > +#ifdef CONFIG_ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE > +static const struct midr_range trbe_overwrite_fill_mode_cpus[] = { > +#ifdef CONFIG_ARM64_ERRATUM_2139208 > + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2), > +#endif > +#ifdef CONFIG_ARM64_ERRATUM_2119858 > + MIDR_ALL_VERSIONS(MIDR_CORTEX_A710), > +#endif > + {}, > +}; > +#endif /* CONFIG_ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE */ > + > const struct arm64_cpu_capabilities arm64_errata[] = { > #ifdef CONFIG_ARM64_WORKAROUND_CLEAN_CACHE > { > @@ -533,6 +545,19 @@ const struct arm64_cpu_capabilities arm64_errata[] = { > .capability = ARM64_WORKAROUND_NVIDIA_CARMEL_CNP, > ERRATA_MIDR_ALL_VERSIONS(MIDR_NVIDIA_CARMEL), > }, > +#endif > +#ifdef CONFIG_ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE > + { > + /* > + * The erratum work around is handled within the TRBE > + * driver and can be applied per-cpu. So, we can allow > + * a late CPU to come online with this erratum. > + */ > + .desc = "ARM erratum 2119858 or 2139208", > + .capability = ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE, > + .type = ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE, > + CAP_MIDR_RANGE_LIST(trbe_overwrite_fill_mode_cpus), > + }, > #endif > { > } > diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps > index 49305c2e6dfd..1ccb92165bd8 100644 > --- a/arch/arm64/tools/cpucaps > +++ b/arch/arm64/tools/cpucaps > @@ -53,6 +53,7 @@ WORKAROUND_1418040 > WORKAROUND_1463225 > WORKAROUND_1508412 > WORKAROUND_1542419 > +WORKAROUND_TRBE_OVERWRITE_FILL_MODE > WORKAROUND_CAVIUM_23154 > WORKAROUND_CAVIUM_27456 > WORKAROUND_CAVIUM_30115 We need to keep this list sorted ? > -- > 2.24.1 > > _______________________________________________ > CoreSight mailing list > CoreSight@lists.linaro.org > https://lists.linaro.org/mailman/listinfo/coresight _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel