From: Linus Walleij <linus.walleij@linaro.org>
To: Rob Herring <robh@kernel.org>
Cc: Linux Crypto Mailing List <linux-crypto@vger.kernel.org>,
Herbert Xu <herbert@gondor.apana.org.au>,
"David S . Miller" <davem@davemloft.net>,
Corentin Labbe <clabbe@baylibre.com>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
Imre Kaloz <kaloz@openwrt.org>,
Krzysztof Halasa <khalasa@piap.pl>,
Arnd Bergmann <arnd@arndb.de>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>
Subject: Re: [PATCH 2/3 v2] crypto: ixp4xx: Add DT bindings
Date: Sat, 22 May 2021 18:26:01 +0200 [thread overview]
Message-ID: <CACRpkdbiKA13VoKLV2Dn-4irc4h5EULNmMptpTrKQDAHDaE4Ng@mail.gmail.com> (raw)
In-Reply-To: <20210521172749.GA33272@robh.at.kernel.org>
On Fri, May 21, 2021 at 7:27 PM Rob Herring <robh@kernel.org> wrote:
> > + intel,npe:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + minimum: 0
> > + maximum: 3
> > + description: phandle to the NPE this ethernet instance is using
>
> Not a phandle now.
>
> > + and the instance to use in the second cell
>
> Maybe 'reg' works here? You can only have 1 thing you address though if
> you use reg here.
Good idea, I'll try that.
> How are other NPE instances used? Are you going to need to have a
> reference to them?
They are used by phandle from the combined ethernet and phy
instances. They are accelerators with firmware which have direct
access to the ethernet and phy port, and one of the NPE:s can
additionally contain a crypto engine.
Yours,
Linus Walleij
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next prev parent reply other threads:[~2021-05-22 16:28 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-20 22:30 [PATCH 2/3 v2] crypto: ixp4xx: Add DT bindings Linus Walleij
2021-05-21 17:27 ` Rob Herring
2021-05-22 16:26 ` Linus Walleij [this message]
2021-05-24 13:47 ` Rob Herring
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