From: Arnd Bergmann <arnd@arndb.de>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: SoC Team <soc@kernel.org>, arm-soc <arm@kernel.org>,
Mark Brown <broonie@kernel.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH] ARM: dts: dir685: Drop spi-cpol from the display
Date: Mon, 16 Sep 2019 16:31:49 +0200 [thread overview]
Message-ID: <CAK8P3a3p7B3DP+yYrmGSAYORLESisPtawUruVQu0xpdBqY_n5A@mail.gmail.com> (raw)
In-Reply-To: <20190915135444.11066-1-linus.walleij@linaro.org>
On Sun, Sep 15, 2019 at 3:55 PM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> The D-Link DIR-685 had its clock polarity set as active
> low using the special SPI "spi-cpol" property.
>
> This is not correct: the datasheet clearly states:
> "Fix SCL to GND level when not in use" which is
> indicative that this line is active high.
>
> After a recent fix making the GPIO-based SPI driver
> force the clock line de-asserted at the beginning of
> each SPI transaction this reared its ugly head: now
> de-asserted was taken to mean the line should be
> driven high, but it should be driven low.
>
> Fix this up in the DTS file and the display works again.
>
> Cc: Mark Brown <broonie@kernel.org>
> Fixes: 2922d1cc1696 ("spi: gpio: Add SPI_MASTER_GPIO_SS flag")
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> ARM SoC folks: please apply this directly to fixes if
> you're OK with the patch.
As the merge window is now open, I just applied this to
the 'arm/late' branch.
Arnd
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prev parent reply other threads:[~2019-09-16 14:32 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-15 13:54 [PATCH] ARM: dts: dir685: Drop spi-cpol from the display Linus Walleij
2019-09-16 14:31 ` Arnd Bergmann [this message]
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