From: Sam Protsenko <semen.protsenko@linaro.org>
To: David Virag <virag.david003@gmail.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
Rob Herring <robh+dt@kernel.org>,
Sylwester Nawrocki <s.nawrocki@samsung.com>,
Tomasz Figa <tomasz.figa@gmail.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH v4 2/7] dt-bindings: clock: Document Exynos7885 CMU bindings
Date: Tue, 7 Dec 2021 20:23:31 +0200 [thread overview]
Message-ID: <CAPLW+4ndzvks6os2W1o+_7dyi_DZKjgqpoFfsS90pzXWVTpkGg@mail.gmail.com> (raw)
In-Reply-To: <20211206153124.427102-3-virag.david003@gmail.com>
On Mon, 6 Dec 2021 at 17:32, David Virag <virag.david003@gmail.com> wrote:
>
> Provide dt-schema documentation for Exynos7885 SoC clock controller.
> Description is modified from Exynos850 clock controller documentation as
> I couldn't describe it any better, that was written by Sam Protsenko.
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> Signed-off-by: David Virag <virag.david003@gmail.com>
> ---
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
> Changes in v2:
> - Fixed double : in description
> - Added R-b tag by Krzysztof Kozlowski
>
> Changes in v3:
> - Nothing
>
> Changes in v4:
> - Fix leading 0x in example.
>
> .../clock/samsung,exynos7885-clock.yaml | 166 ++++++++++++++++++
> 1 file changed, 166 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml
>
> diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml
> new file mode 100644
> index 000000000000..7e5a9cac2fd2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml
> @@ -0,0 +1,166 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/samsung,exynos7885-clock.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung Exynos7885 SoC clock controller
> +
> +maintainers:
> + - Dávid Virág <virag.david003@gmail.com>
> + - Chanwoo Choi <cw00.choi@samsung.com>
> + - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> + - Sylwester Nawrocki <s.nawrocki@samsung.com>
> + - Tomasz Figa <tomasz.figa@gmail.com>
> +
> +description: |
> + Exynos7885 clock controller is comprised of several CMU units, generating
> + clocks for different domains. Those CMU units are modeled as separate device
> + tree nodes, and might depend on each other. The root clock in that root tree
> + is an external clock: OSCCLK (26 MHz). This external clock must be defined
> + as a fixed-rate clock in dts.
> +
> + CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
> + dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
> +
> + Each clock is assigned an identifier and client nodes can use this identifier
> + to specify the clock which they consume. All clocks available for usage
> + in clock consumer nodes are defined as preprocessor macros in
> + 'dt-bindings/clock/exynos7885.h' header.
> +
> +properties:
> + compatible:
> + enum:
> + - samsung,exynos7885-cmu-top
> + - samsung,exynos7885-cmu-core
> + - samsung,exynos7885-cmu-peri
> +
> + clocks:
> + minItems: 1
> + maxItems: 10
> +
> + clock-names:
> + minItems: 1
> + maxItems: 10
> +
> + "#clock-cells":
> + const: 1
> +
> + reg:
> + maxItems: 1
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: samsung,exynos7885-cmu-top
> +
> + then:
> + properties:
> + clocks:
> + items:
> + - description: External reference clock (26 MHz)
> +
> + clock-names:
> + items:
> + - const: oscclk
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: samsung,exynos7885-cmu-core
> +
> + then:
> + properties:
> + clocks:
> + items:
> + - description: External reference clock (26 MHz)
> + - description: CMU_CORE bus clock (from CMU_TOP)
> + - description: CCI clock (from CMU_TOP)
> + - description: G3D clock (from CMU_TOP)
> +
> + clock-names:
> + items:
> + - const: oscclk
> + - const: dout_core_bus
> + - const: dout_core_cci
> + - const: dout_core_g3d
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: samsung,exynos7885-cmu-peri
> +
> + then:
> + properties:
> + clocks:
> + items:
> + - description: External reference clock (26 MHz)
> + - description: CMU_PERI bus clock (from CMU_TOP)
> + - description: SPI0 clock (from CMU_TOP)
> + - description: SPI1 clock (from CMU_TOP)
> + - description: UART0 clock (from CMU_TOP)
> + - description: UART1 clock (from CMU_TOP)
> + - description: UART2 clock (from CMU_TOP)
> + - description: USI0 clock (from CMU_TOP)
> + - description: USI1 clock (from CMU_TOP)
> + - description: USI2 clock (from CMU_TOP)
> +
> + clock-names:
> + items:
> + - const: oscclk
> + - const: dout_peri_bus
> + - const: dout_peri_spi0
> + - const: dout_peri_spi1
> + - const: dout_peri_uart0
> + - const: dout_peri_uart1
> + - const: dout_peri_uart2
> + - const: dout_peri_usi0
> + - const: dout_peri_usi1
> + - const: dout_peri_usi2
> +
> +required:
> + - compatible
> + - "#clock-cells"
> + - clocks
> + - clock-names
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + # Clock controller node for CMU_PERI
> + - |
> + #include <dt-bindings/clock/exynos7885.h>
> +
> + cmu_peri: clock-controller@10010000 {
> + compatible = "samsung,exynos7885-cmu-peri";
> + reg = <0x10010000 0x8000>;
> + #clock-cells = <1>;
> +
> + clocks = <&oscclk>,
> + <&cmu_top CLK_DOUT_PERI_BUS>,
> + <&cmu_top CLK_DOUT_PERI_SPI0>,
> + <&cmu_top CLK_DOUT_PERI_SPI1>,
> + <&cmu_top CLK_DOUT_PERI_UART0>,
> + <&cmu_top CLK_DOUT_PERI_UART1>,
> + <&cmu_top CLK_DOUT_PERI_UART2>,
> + <&cmu_top CLK_DOUT_PERI_USI0>,
> + <&cmu_top CLK_DOUT_PERI_USI1>,
> + <&cmu_top CLK_DOUT_PERI_USI2>;
> + clock-names = "oscclk",
> + "dout_peri_bus",
> + "dout_peri_spi0",
> + "dout_peri_spi1",
> + "dout_peri_uart0",
> + "dout_peri_uart1",
> + "dout_peri_uart2",
> + "dout_peri_usi0",
> + "dout_peri_usi1",
> + "dout_peri_usi2";
> + };
> +
> +...
> --
> 2.34.1
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-12-07 18:25 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-06 15:31 [PATCH v4 0/7] Initial Samsung Galaxy A8 (2018) support David Virag
2021-12-06 15:31 ` [PATCH v4 1/7] dt-bindings: clock: Add bindings definitions for Exynos7885 CMU David Virag
2021-12-07 18:15 ` Sam Protsenko
2021-12-10 21:26 ` Rob Herring
2021-12-12 18:39 ` Krzysztof Kozlowski
2021-12-20 9:40 ` Krzysztof Kozlowski
2021-12-19 22:52 ` Sylwester Nawrocki
2021-12-06 15:31 ` [PATCH v4 2/7] dt-bindings: clock: Document Exynos7885 CMU bindings David Virag
2021-12-07 18:23 ` Sam Protsenko [this message]
2021-12-10 21:28 ` Rob Herring
2021-12-06 15:31 ` [PATCH v4 3/7] dt-bindings: arm: samsung: document jackpotlte board binding David Virag
2021-12-07 18:26 ` Sam Protsenko
2021-12-10 21:30 ` Rob Herring
2021-12-15 16:21 ` (subset) " Krzysztof Kozlowski
2021-12-19 14:53 ` David Virag
2021-12-20 9:38 ` Krzysztof Kozlowski
2021-12-06 15:31 ` [PATCH v4 4/7] clk: samsung: Make exynos850_register_cmu shared David Virag
2021-12-07 9:32 ` Krzysztof Kozlowski
2021-12-07 18:53 ` Sam Protsenko
2021-12-06 15:31 ` [PATCH v4 5/7] clk: samsung: clk-pll: Add support for pll1417x David Virag
2021-12-07 19:00 ` Sam Protsenko
2021-12-08 8:50 ` Krzysztof Kozlowski
2021-12-06 15:31 ` [PATCH v4 6/7] clk: samsung: Add initial Exynos7885 clock driver David Virag
2021-12-07 9:33 ` Krzysztof Kozlowski
2021-12-07 19:14 ` Sam Protsenko
2021-12-06 15:31 ` [PATCH v4 7/7] arm64: dts: exynos: Add initial device tree support for Exynos7885 SoC David Virag
2021-12-07 9:39 ` Krzysztof Kozlowski
2021-12-07 19:42 ` Marc Zyngier
2021-12-19 14:36 ` David Virag
2021-12-20 8:44 ` Marc Zyngier
2021-12-07 20:19 ` Sam Protsenko
2021-12-07 22:29 ` David Virag
2021-12-08 0:55 ` Chanho Park
2021-12-08 9:05 ` Krzysztof Kozlowski
2021-12-08 15:37 ` Sam Protsenko
2021-12-08 16:28 ` Krzysztof Kozlowski
2021-12-08 16:51 ` Sam Protsenko
2022-01-31 15:35 ` Krzysztof Kozlowski
2022-02-01 0:47 ` David Virag
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAPLW+4ndzvks6os2W1o+_7dyi_DZKjgqpoFfsS90pzXWVTpkGg@mail.gmail.com \
--to=semen.protsenko@linaro.org \
--cc=cw00.choi@samsung.com \
--cc=devicetree@vger.kernel.org \
--cc=krzysztof.kozlowski@canonical.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-samsung-soc@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=robh+dt@kernel.org \
--cc=s.nawrocki@samsung.com \
--cc=sboyd@kernel.org \
--cc=tomasz.figa@gmail.com \
--cc=virag.david003@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).