RE: [PATCH RFC] soc: fujitsu: Add cache driver code

From: "tan.shaopeng@fujitsu.com" <tan.shaopeng@fujitsu.com>
To: 'Arnd Bergmann' <arnd@arndb.de>, Will Deacon <will@kernel.org>
Cc: Linux ARM <linux-arm-kernel@lists.infradead.org>,
	SoC Team <soc@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Olof Johansson <olof@lixom.net>,
	James Morse <james.morse@arm.com>,
	"misono.tomohiro@fujitsu.com" <misono.tomohiro@fujitsu.com>,
	"tan.shaopeng@fujitsu.com" <tan.shaopeng@fujitsu.com>
Subject: RE: [PATCH RFC] soc: fujitsu: Add cache driver code
Date: Fri, 5 Mar 2021 07:48:45 +0000	[thread overview]
Message-ID: <OSAPR01MB214684169003710C7ECF0D9B8B969@OSAPR01MB2146.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <CAK8P3a2pFcNTw9NpRtQfYr7A5OcZ=As2kM0D_sbfFcGQ_J2Q+Q@mail.gmail.com>

> On Thu, Mar 4, 2021 at 11:46 AM Will Deacon <will@kernel.org> wrote:
> > On Thu, Mar 04, 2021 at 10:34:43AM +0000, tan.shaopeng@fujitsu.com
> wrote:
> > > > On Wed, Mar 3, 2021 at 10:38 AM tan.shaopeng
> > > > <tan.shaopeng@jp.fujitsu.com> wrote:
> > > > > +
> > > > > +config FUJITSU_CACHE
> > > > > +        tristate "FUJITSU Cache Driver"
> > > > > +        depends on ARM64_VHE || COMPILE_TEST
> > > > > +        help
> > > > > +          FUJITSU Cache Driver
> > > > > +
> > > > > +          This driver offers cache functions for A64FX system.
> > > > > +         Loading this cache driver, control registers will be set to
> enable
> > > > > +         these functions, and advanced settings registers will be set
> by
> > > > default
> > > > > +         values. After loading this driver, you can use the default
> values of
> > > > the
> > > > > +         advanced settings registers or set the advanced settings
> registers
> > > > > +         from EL0. Unloading this driver, control registers will be
> clear to
> > > > > +         disable these functions.
> > > > > +          When built as a module, this will be called as
> "fujitsu_cache".
> > > >
> > > > My feeling is that this code should be in arch/arm64/, as the cache
> > > > is generally considered part of the CPU, rather than part of the wider
> > > > SoC design, or something that can be controlled separately from the
> > > > core kernel and memory management code.
> > >
> > > Thanks for your advice. I also would like to hear the opinions from
> > > other soc&arm maintainers, and then consider whether to add this to
> > > arch/arm64/.
> >
> > Given that all of this is outside of the scope of the architecture, I don't
> > think that arch/arm64/ is the right place for it. Perhaps this would fit
> > into the resctrl rework that James has been doing for MPAM?
> 
> Indeed, that sounds like a good starting point. I don't understand enough
> about either of the two to be sure, but it sounds like there is some overlap
> in functionality, and ideally we would have one user interface that can
> deal with all the hardware implementations (intel, arm, fujitsu and any
> future ones).

I don't know resctrl well and I’m not sure if it can be used for sector cache now.
Also, it seems to me that resctrl has no control with hardware prefetch. 
I will learn more about resctrl.

Best regards, 
Tan Shaopeng
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