From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0CC62C4338F for ; Wed, 4 Aug 2021 06:49:15 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C0B2760EEA for ; Wed, 4 Aug 2021 06:49:14 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org C0B2760EEA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:References:Cc:To:Subject:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=/tDGBtud66LT1Be3InJ8X5ViEipW1GAePA7bQHWcSlw=; b=x13fMFCZ7pau0iaTWFK1J9GHWj em1vigX5qGdedV1wU0lHip+XGgNA9//+KE58k+m0S7SmGZ8dgdxlND8OyWmlzm/Wek0yzaUQ6RvZT cgz1+BOQ9nzT1KWdRB9m+Fa4LRULJeX/1/+N7L61MZyMmTe7ujWWpd0Ea6TvhM3EjqJc8wUVaEEXt 6H8Y6jKFhBrwOWaUumiuGwQ+0EC3JmZIxojxynFi6KFrOnDHFsn1yG8BeBgT8rB11KgOYLoQaRJYR 212x1T9tp9p0S8vNi/UHNTG6ir4KFVdFPTbtQr1ASL1DbQv1doazH9+2H09giBmxU7EjDf8qDkrxQ olHJdaRQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mBAfy-004xZx-VW; Wed, 04 Aug 2021 06:46:51 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mBAfu-004xZV-Sn for linux-arm-kernel@lists.infradead.org; Wed, 04 Aug 2021 06:46:48 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6518011FB; Tue, 3 Aug 2021 23:46:38 -0700 (PDT) Received: from [10.163.67.195] (unknown [10.163.67.195]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 062493F66F; Tue, 3 Aug 2021 23:46:35 -0700 (PDT) From: Anshuman Khandual Subject: Re: [PATCH] arm64/mm: Fix idmap on [16K|36VA|48PA] To: Catalin Marinas Cc: linux-arm-kernel@lists.infradead.org, Will Deacon , James Morse , Marc Zyngier , Mark Rutland , linux-kernel@vger.kernel.org References: <1627879359-30303-1-git-send-email-anshuman.khandual@arm.com> <20210803103440.GA5786@arm.com> <7bad50a2-76f1-7946-3a15-35e46fb289c0@arm.com> <20210803131201.GB5786@arm.com> <4d6a4a0c-7f68-991d-5b0e-08c280543fe8@arm.com> Message-ID: Date: Wed, 4 Aug 2021 12:17:26 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <4d6a4a0c-7f68-991d-5b0e-08c280543fe8@arm.com> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210803_234647_089474_E9A64020 X-CRM114-Status: GOOD ( 23.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 8/4/21 9:16 AM, Anshuman Khandual wrote: > I am working on a solution which re-works idmap extension logic based on the > difference between __idmap_text_end and PGDIR_SHIFT coverage, then creating > additional page table levels and reducing idmap_t0sz appropriately. All the > existing code including this fix here, will be dropped completely. Because > it might be difficult to extend this patch to get the entire thing in order, > the idea was to just fix [16K|36VA|48PA] which could then be backported and > then do the rework in mainline (which need not be backported) FYI. Here is the rework (draft standard, lightly tested and not documented) which I have been working on. It tries to take care of three different situations, when __idmap_text_end would not be covered with the existing idmap levels. 1. idmap requires single new level 2. idmap requires two new levels 3. idmap does not require more levels but idmap_ptrs_per_pgd needs adjustment Applies after the fix here. --- arch/arm64/include/asm/assembler.h | 9 ++++++ arch/arm64/kernel/head.S | 62 +++++++++++++++----------------------- 2 files changed, 33 insertions(+), 38 deletions(-) diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index 89faca0..d826641 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -25,6 +25,15 @@ #include #include + .macro shift_to_nr_ptrs, reg1, reg2, reg3, tmp + ldr_l \reg3, idmap_t0sz + add \reg3, \reg3, \tmp + mov \reg2, #64 + sub \reg2, \reg2, \reg3 + mov \reg1, #1 + lsr \reg1, \reg1, \reg2 + .endm + /* * Provide a wxN alias for each wN register so what we can paste a xN * reference after a 'w' to obtain the 32-bit version. diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index da33bbc..b308787 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -327,54 +327,40 @@ SYM_FUNC_START_LOCAL(__create_page_tables) dmb sy dc ivac, x6 // Invalidate potentially stale cache line -#if (VA_BITS < 48) #define EXTRA_SHIFT (PGDIR_SHIFT + PAGE_SHIFT - 3) #define EXTRA_SHIFT_1 (EXTRA_SHIFT + PAGE_SHIFT - 3) -#define EXTRA_PTRS (1 << (PHYS_MASK_SHIFT - EXTRA_SHIFT)) -#define EXTRA_PTRS_1 (1 << (PHYS_MASK_SHIFT - EXTRA_SHIFT_1)) - - /* - * If VA_BITS < 48, we have to configure an additional table level. - * First, we have to verify our assumption that the current value of - * VA_BITS was chosen such that all translation levels are fully - * utilised, and that lowering T0SZ will always result in an additional - * translation level to be configured. - */ -#if VA_BITS != EXTRA_SHIFT +#if (VA_BITS > EXTRA_SHIFT) #error "Mismatch between VA_BITS and page size/number of translation levels" #endif -/* - * In this particular CONFIG_ARM64_16K_PAGES config, there might be a - * scenario where 'idmap_text_end' ends up high enough in the PA range - * requiring two additional idmap page table levels. Reduce idmap_t0sz - * to cover the entire PA range. This prevents table misconfiguration - * when a given idmap_t0sz value just requires single additional level - * where as two levels have been built. - */ -#if defined(CONFIG_ARM64_VA_BITS_36) && defined(CONFIG_ARM64_PA_BITS_48) - mov x4, EXTRA_PTRS_1 - create_table_entry x0, x3, EXTRA_SHIFT_1, x4, x5, x6 +#if (VA_BITS == EXTRA_SHIFT) + mov x6, #TCR_T0SZ(VA_BITS_MIN) + sub x6, x6, x5 + cmp x6, #(PAGE_SHIFT - 3) + b.gt 8f - mov x4, PTRS_PER_PTE + shift_to_nr_ptrs x4, x5, x6, #EXTRA_SHIFT create_table_entry x0, x3, EXTRA_SHIFT, x4, x5, x6 + b 1f +8: + shift_to_nr_ptrs x4, x5, x6, #EXTRA_SHIFT_1 + create_table_entry x0, x3, EXTRA_SHIFT_1, x4, x5, x6 - mov x5, #64 - PHYS_MASK_SHIFT - adr_l x6, idmap_t0sz - str x5, [x6] - dmb sy - dc ivac, x6 -#else - mov x4, EXTRA_PTRS + mov x4, PTRS_PER_PTE create_table_entry x0, x3, EXTRA_SHIFT, x4, x5, x6 -#endif -#else - /* - * If VA_BITS == 48, we don't have to configure an additional - * translation level, but the top-level table has more entries. - */ - mov x4, #1 << (PHYS_MASK_SHIFT - PGDIR_SHIFT) +#elif (VA_BITS < EXTRA_SHIFT) + mov x6, #64 + sub x6, x6, x5 + cmp x6, EXTRA_SHIFT + b.eq 1f + b.gt 8f + + shift_to_nr_ptrs x4, x5, x6, #PGDIR_SHIFT str_l x4, idmap_ptrs_per_pgd, x5 + b 1f +8: + shift_to_nr_ptrs x4, x5, x6, #EXTRA_SHIFT + create_table_entry x0, x3, EXTRA_SHIFT, x4, x5, x6 #endif 1: ldr_l x4, idmap_ptrs_per_pgd -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel