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Wed, 11 Aug 2021 07:27:03 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Wed, 11 Aug 2021 07:27:03 -0500 Received: from [10.250.233.105] (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 17BCQwr7076212; Wed, 11 Aug 2021 07:26:59 -0500 Subject: Re: [PATCH v2 0/6] PCI: Add support for J7200 and AM64 To: Lorenzo Pieralisi CC: Arnd Bergmann , Rob Herring , Bjorn Helgaas , Lokesh Vutla , Greg Kroah-Hartman , Tom Joseph , , , , , References: <20210803074932.19820-1-kishon@ti.com> <20210803105252.GD11252@lpieralisi> From: Kishon Vijay Abraham I Message-ID: Date: Wed, 11 Aug 2021 17:56:57 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210803105252.GD11252@lpieralisi> Content-Language: en-US X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210811_052858_038914_7E3E2A0E X-CRM114-Status: GOOD ( 21.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Lorenzo, On 03/08/21 4:22 pm, Lorenzo Pieralisi wrote: > On Tue, Aug 03, 2021 at 01:19:26PM +0530, Kishon Vijay Abraham I wrote: >> This series adds the compatible specific to J7200 and AM64 and >> applies the erratas and configuration specific to them. >> >> This series also includes Nadeem's patch that adds a quirk in >> Cadence driver which is used by J7200 [1]. >> >> The DT binding for both J7200 and AM64 is already merged. >> >> v1 of the patch series can be found at [2] >> >> Changes from v1: >> 1) As suggested by Bjorn, used unsigned int :1, instead of bool for >> structure members >> 2) Removed using unnecessary local variables and also fixed some >> code alignment >> >> [1] -> https://lore.kernel.org/r/20210528155626.21793-1-nadeem@cadence.com >> [2] -> https://lore.kernel.org/r/20210706105035.9915-1-kishon@ti.com >> >> Kishon Vijay Abraham I (5): >> PCI: cadence: Use bitfield for *quirk_retrain_flag* instead of bool >> PCI: j721e: Add PCIe support for J7200 >> PCI: j721e: Add PCIe support for AM64 >> misc: pci_endpoint_test: Do not request or allocate IRQs in probe >> misc: pci_endpoint_test: Add deviceID for AM64 and J7200 >> >> Nadeem Athani (1): >> PCI: cadence: Add quirk flag to set minimum delay in LTSSM >> Detect.Quiet state >> >> drivers/misc/pci_endpoint_test.c | 27 ++++++-- >> drivers/pci/controller/cadence/pci-j721e.c | 61 +++++++++++++++++-- >> .../pci/controller/cadence/pcie-cadence-ep.c | 4 ++ >> .../controller/cadence/pcie-cadence-host.c | 3 + >> drivers/pci/controller/cadence/pcie-cadence.c | 17 ++++++ >> drivers/pci/controller/cadence/pcie-cadence.h | 17 +++++- >> 6 files changed, 117 insertions(+), 12 deletions(-) > > I am not convinced about patch (5) the rest of the series can be > merged (even though I assume patch (6) depends on (5)). I'll drop patch 5, fix your other comments and send a new revision. Thanks, Kishon _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel