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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id h59sm2323309otb.29.2021.05.15.21.31.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 15 May 2021 21:31:54 -0700 (PDT) Date: Sat, 15 May 2021 23:31:52 -0500 From: Bjorn Andersson To: Dmitry Baryshkov Cc: Rob Clark , Sean Paul , Jonathan Marek , Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: Re: [PATCH v1 2/3] drm/msm/dpu: hw_intr: always call dpu_hw_intr_clear_intr_status_nolock Message-ID: <20210516043152.GP2484@yoga> References: <20210412000954.2049141-1-dmitry.baryshkov@linaro.org> <20210412000954.2049141-3-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210412000954.2049141-3-dmitry.baryshkov@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Sun 11 Apr 19:09 CDT 2021, Dmitry Baryshkov wrote: > Always call dpu_hw_intr_clear_intr_status_nolock() from the > dpu_hw_intr_dispatch_irqs(). This simplifies the callback function > (which call clears the interrupts anyway) and enforces clearing the hw > interrupt status. > Reviewed-by: Bjorn Andersson Regards, Bjorn > Signed-off-by: Dmitry Baryshkov > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 9 ----- > .../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 39 +++++++++---------- > .../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 9 ----- > 3 files changed, 18 insertions(+), 39 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c > index 54b34746a587..fd11a2aeab6c 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c > @@ -41,15 +41,6 @@ static void dpu_core_irq_callback_handler(void *arg, int irq_idx) > if (cb->func) > cb->func(cb->arg, irq_idx); > spin_unlock_irqrestore(&dpu_kms->irq_obj.cb_lock, irq_flags); > - > - /* > - * Clear pending interrupt status in HW. > - * NOTE: dpu_core_irq_callback_handler is protected by top-level > - * spinlock, so it is safe to clear any interrupt status here. > - */ > - dpu_kms->hw_intr->ops.clear_intr_status_nolock( > - dpu_kms->hw_intr, > - irq_idx); > } > > int dpu_core_irq_idx_lookup(struct dpu_kms *dpu_kms, > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c > index cf9bfd45aa59..8bd22e060437 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c > @@ -1362,6 +1362,22 @@ static int dpu_hw_intr_irqidx_lookup(struct dpu_hw_intr *intr, > return -EINVAL; > } > > +static void dpu_hw_intr_clear_intr_status_nolock(struct dpu_hw_intr *intr, > + int irq_idx) > +{ > + int reg_idx; > + > + if (!intr) > + return; > + > + reg_idx = dpu_irq_map[irq_idx].reg_idx; > + DPU_REG_WRITE(&intr->hw, dpu_intr_set[reg_idx].clr_off, > + dpu_irq_map[irq_idx].irq_mask); > + > + /* ensure register writes go through */ > + wmb(); > +} > + > static void dpu_hw_intr_dispatch_irq(struct dpu_hw_intr *intr, > void (*cbfunc)(void *, int), > void *arg) > @@ -1430,9 +1446,8 @@ static void dpu_hw_intr_dispatch_irq(struct dpu_hw_intr *intr, > */ > if (cbfunc) > cbfunc(arg, irq_idx); > - else > - intr->ops.clear_intr_status_nolock( > - intr, irq_idx); > + > + dpu_hw_intr_clear_intr_status_nolock(intr, irq_idx); > > /* > * When callback finish, clear the irq_status > @@ -1597,23 +1612,6 @@ static int dpu_hw_intr_disable_irqs(struct dpu_hw_intr *intr) > return 0; > } > > - > -static void dpu_hw_intr_clear_intr_status_nolock(struct dpu_hw_intr *intr, > - int irq_idx) > -{ > - int reg_idx; > - > - if (!intr) > - return; > - > - reg_idx = dpu_irq_map[irq_idx].reg_idx; > - DPU_REG_WRITE(&intr->hw, dpu_intr_set[reg_idx].clr_off, > - dpu_irq_map[irq_idx].irq_mask); > - > - /* ensure register writes go through */ > - wmb(); > -} > - > static u32 dpu_hw_intr_get_interrupt_status(struct dpu_hw_intr *intr, > int irq_idx, bool clear) > { > @@ -1655,7 +1653,6 @@ static void __setup_intr_ops(struct dpu_hw_intr_ops *ops) > ops->dispatch_irqs = dpu_hw_intr_dispatch_irq; > ops->clear_all_irqs = dpu_hw_intr_clear_irqs; > ops->disable_all_irqs = dpu_hw_intr_disable_irqs; > - ops->clear_intr_status_nolock = dpu_hw_intr_clear_intr_status_nolock; > ops->get_interrupt_status = dpu_hw_intr_get_interrupt_status; > } > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h > index 5a1c304ba93f..5bade5637ecc 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h > @@ -142,15 +142,6 @@ struct dpu_hw_intr_ops { > void (*cbfunc)(void *arg, int irq_idx), > void *arg); > > - /** > - * clear_intr_status_nolock() - clears the HW interrupts without lock > - * @intr: HW interrupt handle > - * @irq_idx: Lookup irq index return from irq_idx_lookup > - */ > - void (*clear_intr_status_nolock)( > - struct dpu_hw_intr *intr, > - int irq_idx); > - > /** > * get_interrupt_status - Gets HW interrupt status, and clear if set, > * based on given lookup IRQ index. > -- > 2.30.2 >