From: Krishna chaitanya chundru <quic_krichai@quicinc.com>
To: "Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konrad.dybcio@linaro.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
johan+linaro@kernel.org, bmasney@redhat.com, djakov@kernel.org
Cc: <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<vireshk@kernel.org>, <quic_vbadigan@quicinc.com>,
<quic_skananth@quicinc.com>, <quic_nitegupt@quicinc.com>,
<quic_parass@quicinc.com>, <quic_krichai@quicinc.com>,
<krzysztof.kozlowski@linaro.org>
Subject: [PATCH v12 1/6] arm64: dts: qcom: sm8450: Add interconnect path to PCIe node
Date: Sat, 27 Apr 2024 07:22:34 +0530 [thread overview]
Message-ID: <20240427-opp_support-v12-1-f6beb0a1f2fc@quicinc.com> (raw)
In-Reply-To: <20240427-opp_support-v12-0-f6beb0a1f2fc@quicinc.com>
Add PCIe-MEM & CPU-PCIe interconnect path to the PCIe nodes.
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index b86be34a912b..615296e13c43 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -1807,6 +1807,12 @@ pcie0: pcie@1c00000 {
<0 0 0 3 &intc 0 0 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
<0 0 0 4 &intc 0 0 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
+ interconnects = <&pcie_noc MASTER_PCIE_0 QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
+ <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
+ &config_noc SLAVE_PCIE_0 QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "pcie-mem", "cpu-pcie";
+
clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
<&gcc GCC_PCIE_0_PIPE_CLK_SRC>,
<&pcie0_phy>,
@@ -1930,6 +1936,12 @@ pcie1: pcie@1c08000 {
<0 0 0 3 &intc 0 0 0 438 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
<0 0 0 4 &intc 0 0 0 439 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
+ interconnects = <&pcie_noc MASTER_PCIE_1 QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
+ <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
+ &config_noc SLAVE_PCIE_1 QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "pcie-mem", "cpu-pcie";
+
clocks = <&gcc GCC_PCIE_1_PIPE_CLK>,
<&gcc GCC_PCIE_1_PIPE_CLK_SRC>,
<&pcie1_phy>,
--
2.42.0
next prev parent reply other threads:[~2024-04-27 1:54 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-27 1:52 [PATCH v12 0/6] PCI: qcom: Add support for OPP Krishna chaitanya chundru
2024-04-27 1:52 ` Krishna chaitanya chundru [this message]
2024-04-27 1:52 ` [PATCH v12 2/6] PCI: qcom: Add ICC bandwidth vote for CPU to PCIe path Krishna chaitanya chundru
2024-04-30 5:21 ` Manivannan Sadhasivam
2024-05-09 18:34 ` Mayank Rana
2024-04-27 1:52 ` [PATCH v12 3/6] dt-bindings: pci: qcom: Add OPP table Krishna chaitanya chundru
2024-04-27 1:52 ` [PATCH v12 4/6] arm64: dts: qcom: sm8450: Add OPP table support to PCIe Krishna chaitanya chundru
2024-04-27 1:52 ` [PATCH v12 5/6] PCI: Bring the PCIe speed to MBps logic to new pcie_link_speed_to_mbps() Krishna chaitanya chundru
2024-04-27 1:52 ` [PATCH v12 6/6] PCI: qcom: Add OPP support to scale performance Krishna chaitanya chundru
2024-04-30 5:26 ` Manivannan Sadhasivam
2024-05-09 15:51 ` Krishna Chaitanya Chundru
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