Re: [PATCH v4 0/4] arm64: dts: qcom: qrb5165-rb5: use GPIO as SPI0 CS

[Dmitry Baryshkov <dmitry.baryshkov@linaro.org>]

Colleagues,

On Wed, 10 Feb 2021 at 16:36, Dmitry Baryshkov
<dmitry.baryshkov@linaro.org> wrote:
>
> GENI SPI controller shows several issues if it manages the CS on its own
> (see 37dd4b777942 ("arm64: dts: qcom: sc7180: Provide pinconf for SPI to
> use GPIO for CS") for the details). Configure SPI0 CS pin as a GPIO.

Should I improve this patchset in any way or is it fine to go?

> Changes since v3:
>  - Rephrase qrb5165-rb5 commit
>  - Remove leftover  pinctrl-name entries for spi0
>  - Group pinctrl entries at the end of qrb5165-rb5.
>
> Changes since v2:
>  - Move pinctrl-names to the board file.
>  - Reorder CS/CS-gpio/data-clk nodes to follow alphabetical sort.
>
> Changes since v1:
>  - Split sm8250's spi pin config into mux/config parts, split away CS
>    handling from main SPI pinctrl nodes.
>
> ----------------------------------------------------------------
> Dmitry Baryshkov (4):
>       arm64: dts: qcom: sm8250: split spi pinctrl config
>       arm64: dts: qcom: sm8250: further split of spi pinctrl config
>       arm64: dts: qcom: sm8250: add pinctrl for SPI using GPIO as a CS
>       arm64: dts: qcom: qrb5165-rb5: switch into using GPIO for SPI0 CS
>
>  arch/arm64/boot/dts/qcom/qrb5165-rb5.dts |  14 +
>  arch/arm64/boot/dts/qcom/sm8250.dtsi     | 540 +++++++++++++++----------------
>  2 files changed, 274 insertions(+), 280 deletions(-)
>
>


-- 
With best wishes
Dmitry