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From: Adrian Hunter <adrian.hunter@intel.com>
To: Ritesh Harjani <riteshh@codeaurora.org>,
	ulf.hansson@linaro.org, linux-mmc@vger.kernel.org,
	shawn.lin@rock-chips.com, sboyd@codeaurora.org
Cc: devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
	david.brown@linaro.org, andy.gross@linaro.org,
	linux-arm-msm@vger.kernel.org, georgi.djakov@linaro.org,
	alex.lemberg@sandisk.com, mateusz.nowak@intel.com,
	Yuliy.Izrailov@sandisk.com, asutoshd@codeaurora.org,
	kdorfman@codeaurora.org, david.griego@linaro.org,
	stummala@codeaurora.org, venkatg@codeaurora.org,
	rnayak@codeaurora.org, pramod.gurav@linaro.org
Subject: Re: [PATCH v6 12/14] mmc: sdhci-msm: Save the calculated tuning phase
Date: Tue, 8 Nov 2016 14:41:19 +0200	[thread overview]
Message-ID: <eb259443-e783-3abc-80c7-d4e7ec96ff9b@intel.com> (raw)
In-Reply-To: <1478517877-23733-13-git-send-email-riteshh@codeaurora.org>

On 07/11/16 13:24, Ritesh Harjani wrote:
> Save the tuning phase once the tuning is performed.
> This phase value will be used while calibrating DLL
> for HS400 mode.
> 
> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

> ---
>  drivers/mmc/host/sdhci-msm.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index 2561c41..6431bb8 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -74,6 +74,7 @@
>  
>  #define CORE_VENDOR_SPEC_CAPABILITIES0	0x11c
>  
> +#define INVALID_TUNING_PHASE	-1
>  #define TCXO_FREQ		19200000
>  #define SDHCI_MSM_MIN_CLOCK	400000
>  #define CORE_FREQ_100MHZ	(100 * 1000 * 1000)
> @@ -95,6 +96,7 @@ struct sdhci_msm_host {
>  	bool use_14lpp_dll_reset;
>  	bool tuning_done;
>  	bool calibration_done;
> +	u8 saved_tuning_phase;
>  };
>  
>  /* Platform specific tuning */
> @@ -134,6 +136,9 @@ static int msm_config_cm_dll_phase(struct sdhci_host *host, u8 phase)
>  	u32 config;
>  	struct mmc_host *mmc = host->mmc;
>  
> +	if (phase > 0xf)
> +		return -EINVAL;
> +
>  	spin_lock_irqsave(&host->lock, flags);
>  
>  	config = readl_relaxed(host->ioaddr + CORE_DLL_CONFIG);
> @@ -431,6 +436,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
>  	int rc;
>  	struct mmc_host *mmc = host->mmc;
>  	struct mmc_ios ios = host->mmc->ios;
> +	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> +	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
>  
>  	/*
>  	 * Tuning is required for SDR104, HS200 and HS400 cards and
> @@ -455,6 +462,7 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
>  		if (rc)
>  			return rc;
>  
> +		msm_host->saved_tuning_phase = phase;
>  		rc = mmc_send_tuning(mmc, opcode, NULL);
>  		if (!rc) {
>  			/* Tuning is successful at this tuning point */
> @@ -826,6 +834,8 @@ static int sdhci_msm_probe(struct platform_device *pdev)
>  
>  	sdhci_get_of_property(pdev);
>  
> +	msm_host->saved_tuning_phase = INVALID_TUNING_PHASE;
> +
>  	/* Setup SDCC bus voter clock. */
>  	msm_host->bus_clk = devm_clk_get(&pdev->dev, "bus");
>  	if (!IS_ERR(msm_host->bus_clk)) {
> 

  reply	other threads:[~2016-11-08 12:46 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-07 11:24 [PATCH v6 00/14] mmc: sdhci-msm: Add clk-rates, DDR, HS400 support Ritesh Harjani
2016-11-07 11:24 ` [PATCH v6 02/14] clk: qcom: Add rcg ops to return floor value closest to the requested rate Ritesh Harjani
     [not found]   ` <1478517877-23733-3-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-07 13:51     ` kbuild test robot
2016-11-08 23:02     ` Stephen Boyd
2016-11-09 11:53       ` Ritesh Harjani
2016-11-07 13:51   ` [PATCH] clk: qcom: fix semicolon.cocci warnings kbuild test robot
2016-11-07 11:24 ` [PATCH v6 03/14] clk: qcom: Move all sdcc rcgs to use clk_rcg2_floor_ops Ritesh Harjani
     [not found] ` <1478517877-23733-1-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-07 11:24   ` [PATCH v6 01/14] clk: Add clk_hw_get_clk() helper API to be used by clk providers Ritesh Harjani
     [not found]     ` <1478517877-23733-2-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-08  3:37       ` Rajendra Nayak
     [not found]         ` <58214862.8080604-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-08  4:08           ` Ritesh Harjani
2016-11-07 11:24   ` [PATCH v6 04/14] mmc: sdhci-msm: Change poor style writel/readl of registers Ritesh Harjani
2016-11-08 23:07     ` Stephen Boyd
     [not found]       ` <20161108230724.GO16026-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-09 11:55         ` Ritesh Harjani
2016-11-07 11:24   ` [PATCH v6 10/14] arm64: dts: qcom: msm8916: Add ddr support to sdhc1 Ritesh Harjani
2016-11-07 11:24   ` [PATCH v6 12/14] mmc: sdhci-msm: Save the calculated tuning phase Ritesh Harjani
2016-11-08 12:41     ` Adrian Hunter [this message]
2016-11-07 11:24 ` [PATCH v6 05/14] mmc: sdhci-msm: Update DLL reset sequence Ritesh Harjani
2016-11-08 23:06   ` Stephen Boyd
     [not found]     ` <20161108230622.GN16026-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-08 23:14       ` Arnd Bergmann
2016-11-09 12:06     ` Ritesh Harjani
2016-11-09 20:43       ` Stephen Boyd
2016-11-14  6:03         ` Ritesh Harjani
2016-11-07 11:24 ` [PATCH v6 06/14] mmc: sdhci-msm: Add get_min_clock() and get_max_clock() callback Ritesh Harjani
     [not found]   ` <1478517877-23733-7-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-08 12:15     ` Adrian Hunter
2016-11-07 11:24 ` [PATCH v6 07/14] mmc: sdhci-msm: Enable few quirks Ritesh Harjani
2016-11-07 11:24 ` [PATCH v6 08/14] mmc: sdhci-msm: Implement set_clock callback for sdhci-msm Ritesh Harjani
2016-11-08 12:16   ` Adrian Hunter
2016-11-07 11:24 ` [PATCH v6 09/14] mmc: sdhci-msm: Add clock changes for DDR mode Ritesh Harjani
2016-11-08 12:20   ` Adrian Hunter
2016-11-07 11:24 ` [PATCH v6 11/14] mmc: sdhci-msm: Add HS400 platform support Ritesh Harjani
2016-11-08 12:37   ` Adrian Hunter
2016-11-07 11:24 ` [PATCH v6 13/14] mmc: sdhci-msm: Add calibration tuning for CDCLP533 circuit Ritesh Harjani
2016-11-08 12:50   ` Adrian Hunter
2016-11-07 11:24 ` [PATCH v6 14/14] sdhci: sdhci-msm: update dll configuration Ritesh Harjani
     [not found]   ` <1478517877-23733-15-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-08 12:57     ` Adrian Hunter

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