From: Marc Gonzalez <marc.w.gonzalez-GANU6spQydw@public.gmane.org>
To: Bjorn Andersson
<bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: Jeffrey Hugo <jhugo-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
MSM <linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
Douglas Anderson
<dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
Evan Green <evgreen-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
Stanimir Varbanov
<stanimir.varbanov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Manu Gautam <mgautam-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
iommu
<iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org>,
Srinivas Kandagatla
<srinivas.kandagatla-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>
Subject: [PATCH v2 1/2] arm64: dts: qcom: msm8998: Add ANOC1 SMMU node
Date: Mon, 1 Apr 2019 17:40:13 +0200 [thread overview]
Message-ID: <edade219-aa77-e7f0-af68-1c192632b2ca@free.fr> (raw)
The MSM8998 ANOC1(*) SMMU services BLSP2, PCIe, UFS, and USB.
(*) Aggregate Network-on-Chip #1
Based on the following DTS downstream:
https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/msm-arm-smmu-8998.dtsi?h=LE.UM.1.3.r3.25#n18
Signed-off-by: Marc Gonzalez <marc.w.gonzalez-GANU6spQydw@public.gmane.org>
---
Changes from v1:
Split off from "PCIe and AR8151 on APQ8098/MSM8998" series
Change compatible string to use qcom,msm8998-smmu-v2
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index ef71e8f1d102..f807ea3e2c6e 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -606,6 +606,21 @@
#thermal-sensor-cells = <1>;
};
+ anoc1_smmu: arm,smmu@1680000 {
+ compatible = "qcom,msm8998-smmu-v2", "qcom,smmu-v2";
+ reg = <0x01680000 0x10000>;
+ #iommu-cells = <1>;
+
+ #global-interrupts = <0>;
+ interrupts =
+ <GIC_SPI 364 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 365 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 366 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 367 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 368 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 369 IRQ_TYPE_EDGE_RISING>;
+ };
+
tcsr_mutex_regs: syscon@1f40000 {
compatible = "syscon";
reg = <0x1f40000 0x20000>;
--
2.17.1
next reply other threads:[~2019-04-01 15:40 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-01 15:40 Marc Gonzalez [this message]
[not found] ` <edade219-aa77-e7f0-af68-1c192632b2ca-GANU6spQydw@public.gmane.org>
2019-04-01 15:44 ` [PATCH v2 2/2] dt-bindings: arm-smmu: Add qcom,msm8998-smmu-v2 binding Marc Gonzalez
[not found] ` <f5029889-6aaa-1315-0225-9b0e46e0697c-GANU6spQydw@public.gmane.org>
2019-04-11 14:50 ` Marc Gonzalez
2019-04-11 14:50 ` Marc Gonzalez
2019-04-02 7:37 ` [PATCH v2 1/2] arm64: dts: qcom: msm8998: Add ANOC1 SMMU node Marc Gonzalez
2019-04-11 14:49 ` Marc Gonzalez
2019-04-11 14:49 ` Marc Gonzalez
2019-06-17 15:49 ` Bjorn Andersson
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