From: abhinavk@codeaurora.org
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
Jonathan Marek <jonathan@marek.ca>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
freedreno@lists.freedesktop.org, linux-clk@vger.kernel.org
Subject: Re: [Freedreno] [PATCH v3 14/25] drm/msm/dsi: make save/restore_state phy-level functions
Date: Mon, 29 Mar 2021 16:51:08 -0700 [thread overview]
Message-ID: <fe359f280ba68c2fe4f92d70d34cc4a6@codeaurora.org> (raw)
In-Reply-To: <20210327110305.3289784-15-dmitry.baryshkov@linaro.org>
On 2021-03-27 04:02, Dmitry Baryshkov wrote:
> Morph msm_dsi_pll_save/restore_state() into
> msm_dsi_phy_save/restore_state(),
> thus removing last bits of knowledge about msm_dsi_pll from
> dsi_manager.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> drivers/gpu/drm/msm/dsi/dsi.h | 18 ++---------
> drivers/gpu/drm/msm/dsi/dsi_manager.c | 6 ++--
> drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 35 +++++++++++++++-------
> drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 11 +++++++
> drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c | 2 +-
> drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 2 +-
> drivers/gpu/drm/msm/dsi/phy/dsi_pll.c | 26 ----------------
> drivers/gpu/drm/msm/dsi/phy/dsi_pll.h | 11 -------
> 8 files changed, 42 insertions(+), 69 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dsi/dsi.h
> b/drivers/gpu/drm/msm/dsi/dsi.h
> index 0970f05cd47f..53feea9d30c0 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi.h
> +++ b/drivers/gpu/drm/msm/dsi/dsi.h
> @@ -92,21 +92,6 @@ static inline bool msm_dsi_device_connected(struct
> msm_dsi *msm_dsi)
>
> struct drm_encoder *msm_dsi_get_encoder(struct msm_dsi *msm_dsi);
>
> -/* dsi pll */
> -struct msm_dsi_pll;
> -#ifdef CONFIG_DRM_MSM_DSI_PLL
> -void msm_dsi_pll_save_state(struct msm_dsi_pll *pll);
> -int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll);
> -#else
> -static inline void msm_dsi_pll_save_state(struct msm_dsi_pll *pll)
> -{
> -}
> -static inline int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll)
> -{
> - return 0;
> -}
> -#endif
> -
> /* dsi host */
> struct msm_dsi_host;
> int msm_dsi_host_xfer_prepare(struct mipi_dsi_host *host,
> @@ -182,11 +167,12 @@ int msm_dsi_phy_enable(struct msm_dsi_phy *phy,
> int src_pll_id,
> void msm_dsi_phy_disable(struct msm_dsi_phy *phy);
> void msm_dsi_phy_get_shared_timings(struct msm_dsi_phy *phy,
> struct msm_dsi_phy_shared_timings *shared_timing);
> -struct msm_dsi_pll *msm_dsi_phy_get_pll(struct msm_dsi_phy *phy);
> void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy,
> enum msm_dsi_phy_usecase uc);
> int msm_dsi_phy_get_clk_provider(struct msm_dsi_phy *phy,
> struct clk **byte_clk_provider, struct clk **pixel_clk_provider);
> +void msm_dsi_phy_save_state(struct msm_dsi_phy *phy);
> +int msm_dsi_phy_restore_state(struct msm_dsi_phy *phy);
I think renaming these to
msm_dsi_phy_pll_save_state()/msm_dsi_phy_pll_restore_state()
will be better because internally they are only saving/restoring PLL
states,
Once thats fixed, please feel free to add :
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
>
> #endif /* __DSI_CONNECTOR_H__ */
>
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_manager.c
> b/drivers/gpu/drm/msm/dsi/dsi_manager.c
> index 86e36be58701..0c47c5fb1ab3 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_manager.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c
> @@ -498,7 +498,6 @@ static void dsi_mgr_bridge_post_disable(struct
> drm_bridge *bridge)
> struct msm_dsi *msm_dsi1 = dsi_mgr_get_dsi(DSI_1);
> struct mipi_dsi_host *host = msm_dsi->host;
> struct drm_panel *panel = msm_dsi->panel;
> - struct msm_dsi_pll *src_pll;
> bool is_dual_dsi = IS_DUAL_DSI();
> int ret;
>
> @@ -532,9 +531,8 @@ static void dsi_mgr_bridge_post_disable(struct
> drm_bridge *bridge)
> id, ret);
> }
>
> - /* Save PLL status if it is a clock source */
> - src_pll = msm_dsi_phy_get_pll(msm_dsi->phy);
> - msm_dsi_pll_save_state(src_pll);
> + /* Save PHY status if it is a clock source */
> + msm_dsi_phy_save_state(msm_dsi->phy);
>
> ret = msm_dsi_host_power_off(host);
> if (ret)
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> index 46561435a27d..176930800082 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> @@ -799,9 +799,9 @@ int msm_dsi_phy_enable(struct msm_dsi_phy *phy,
> int src_pll_id,
> * source.
> */
> if (phy->usecase != MSM_DSI_PHY_SLAVE) {
> - ret = msm_dsi_pll_restore_state(phy->pll);
> + ret = msm_dsi_phy_restore_state(phy);
> if (ret) {
> - DRM_DEV_ERROR(dev, "%s: failed to restore pll state, %d\n",
> + DRM_DEV_ERROR(dev, "%s: failed to restore phy state, %d\n",
> __func__, ret);
> goto pll_restor_fail;
> }
> @@ -838,14 +838,6 @@ void msm_dsi_phy_get_shared_timings(struct
> msm_dsi_phy *phy,
> sizeof(*shared_timings));
> }
>
> -struct msm_dsi_pll *msm_dsi_phy_get_pll(struct msm_dsi_phy *phy)
> -{
> - if (!phy)
> - return NULL;
> -
> - return phy->pll;
> -}
> -
> void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy,
> enum msm_dsi_phy_usecase uc)
> {
> @@ -863,3 +855,26 @@ int msm_dsi_phy_get_clk_provider(struct
> msm_dsi_phy *phy,
>
> return -EINVAL;
> }
> +
> +void msm_dsi_phy_save_state(struct msm_dsi_phy *phy)
> +{
> + if (phy->cfg->pll_ops.save_state) {
> + phy->cfg->pll_ops.save_state(phy->pll);
> + phy->pll->state_saved = true;
> + }
> +}
> +
> +int msm_dsi_phy_restore_state(struct msm_dsi_phy *phy)
> +{
> + int ret;
> +
> + if (phy->cfg->pll_ops.restore_state && phy->pll->state_saved) {
> + ret = phy->cfg->pll_ops.restore_state(phy->pll);
> + if (ret)
> + return ret;
> +
> + phy->pll->state_saved = false;
> + }
> +
> + return 0;
> +}
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> index 2c5196844ba9..8133732e0c7f 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> @@ -6,6 +6,7 @@
> #ifndef __DSI_PHY_H__
> #define __DSI_PHY_H__
>
> +#include <linux/clk-provider.h>
> #include <linux/regulator/consumer.h>
>
> #include "dsi.h"
> @@ -13,6 +14,16 @@
> #define dsi_phy_read(offset) msm_readl((offset))
> #define dsi_phy_write(offset, data) msm_writel((data), (offset))
>
> +struct msm_dsi_pll {
> + struct clk_hw clk_hw;
> + bool pll_on;
> + bool state_saved;
> +
> + const struct msm_dsi_phy_cfg *cfg;
> +};
> +
> +#define hw_clk_to_pll(x) container_of(x, struct msm_dsi_pll, clk_hw)
> +
> struct msm_dsi_phy_ops {
> int (*pll_init)(struct msm_dsi_phy *phy);
> int (*enable)(struct msm_dsi_phy *phy, int src_pll_id,
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> index 6300b92c65eb..e0df12a841b2 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> @@ -782,7 +782,7 @@ static int dsi_pll_10nm_init(struct msm_dsi_phy
> *phy)
> phy->pll = pll;
>
> /* TODO: Remove this when we have proper display handover support */
> - msm_dsi_pll_save_state(pll);
> + msm_dsi_phy_save_state(phy);
>
> return 0;
> }
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> index c482e51d1bee..e6c8040e1bd3 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> @@ -807,7 +807,7 @@ static int dsi_pll_7nm_init(struct msm_dsi_phy
> *phy)
> phy->pll = pll;
>
> /* TODO: Remove this when we have proper display handover support */
> - msm_dsi_pll_save_state(pll);
> + msm_dsi_phy_save_state(phy);
>
> return 0;
> }
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_pll.c
> b/drivers/gpu/drm/msm/dsi/phy/dsi_pll.c
> index 96de79b94f1b..652c2d6bfeec 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_pll.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_pll.c
> @@ -56,29 +56,3 @@ void msm_dsi_pll_helper_clk_unprepare(struct clk_hw
> *hw)
>
> pll->pll_on = false;
> }
> -
> -/*
> - * DSI PLL API
> - */
> -void msm_dsi_pll_save_state(struct msm_dsi_pll *pll)
> -{
> - if (pll->cfg->pll_ops.save_state) {
> - pll->cfg->pll_ops.save_state(pll);
> - pll->state_saved = true;
> - }
> -}
> -
> -int msm_dsi_pll_restore_state(struct msm_dsi_pll *pll)
> -{
> - int ret;
> -
> - if (pll->cfg->pll_ops.restore_state && pll->state_saved) {
> - ret = pll->cfg->pll_ops.restore_state(pll);
> - if (ret)
> - return ret;
> -
> - pll->state_saved = false;
> - }
> -
> - return 0;
> -}
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_pll.h
> b/drivers/gpu/drm/msm/dsi/phy/dsi_pll.h
> index c94f079b8275..eca13cf67c21 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_pll.h
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_pll.h
> @@ -6,21 +6,10 @@
> #ifndef __DSI_PLL_H__
> #define __DSI_PLL_H__
>
> -#include <linux/clk-provider.h>
> #include <linux/delay.h>
>
> #include "dsi.h"
>
> -struct msm_dsi_pll {
> - struct clk_hw clk_hw;
> - bool pll_on;
> - bool state_saved;
> -
> - const struct msm_dsi_phy_cfg *cfg;
> -};
> -
> -#define hw_clk_to_pll(x) container_of(x, struct msm_dsi_pll, clk_hw)
> -
> static inline void pll_write(void __iomem *reg, u32 data)
> {
> msm_writel(data, reg);
next prev parent reply other threads:[~2021-03-29 23:52 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-27 11:02 [PATCH v3 00/25] drm/msm/dsi: refactor MSM DSI PHY/PLL drivers Dmitry Baryshkov
2021-03-27 11:02 ` [PATCH v3 01/25] clk: fixed: add devm helper for clk_hw_register_fixed_factor() Dmitry Baryshkov
2021-03-29 21:55 ` abhinavk
2021-03-27 11:02 ` [PATCH v3 02/25] clk: mux: provide devm_clk_hw_register_mux() Dmitry Baryshkov
2021-03-30 0:46 ` Stephen Boyd
2021-03-27 11:02 ` [PATCH v3 03/25] clk: divider: add devm_clk_hw_register_divider Dmitry Baryshkov
2021-03-30 0:46 ` Stephen Boyd
2021-03-27 11:02 ` [PATCH v3 04/25] drm/msm/dsi: replace PHY's init callback with configurable data Dmitry Baryshkov
2021-03-27 11:02 ` [PATCH v3 06/25] drm/msm/dsi: drop multiple pll enable_seq support Dmitry Baryshkov
2021-03-27 11:02 ` [PATCH v3 07/25] drm/msm/dsi: move all PLL callbacks into PHY config struct Dmitry Baryshkov
2021-03-27 11:02 ` [PATCH v3 08/25] drm/msm/dsi: drop global msm_dsi_phy_type enumaration Dmitry Baryshkov
2021-03-27 11:02 ` [PATCH v3 09/25] drm/msm/dsi: move min/max PLL rate to phy config Dmitry Baryshkov
2021-03-27 11:02 ` [PATCH v3 10/25] drm/msm/dsi: remove msm_dsi_pll_set_usecase Dmitry Baryshkov
2021-03-27 11:02 ` [PATCH v3 11/25] drm/msm/dsi: push provided clocks handling into a generic code Dmitry Baryshkov
2021-03-29 22:12 ` [Freedreno] " abhinavk
2021-03-27 11:02 ` [PATCH v3 12/25] drm/msm/dsi: use devm_clk_*register to registe DSI PHY clocks Dmitry Baryshkov
2021-03-29 23:33 ` [Freedreno] " abhinavk
2021-03-30 0:49 ` Stephen Boyd
2021-03-27 11:02 ` [PATCH v3 13/25] drm/msm/dsi: use devm_of_clk_add_hw_provider Dmitry Baryshkov
2021-03-29 23:43 ` [Freedreno] " abhinavk
2021-03-30 0:50 ` Stephen Boyd
2021-03-27 11:02 ` [PATCH v3 14/25] drm/msm/dsi: make save/restore_state phy-level functions Dmitry Baryshkov
2021-03-29 23:51 ` abhinavk [this message]
2021-03-27 11:02 ` [PATCH v3 15/25] drm/msm/dsi: drop vco_delay setting from 7nm, 10nm, 14nm drivers Dmitry Baryshkov
2021-03-30 0:01 ` [Freedreno] " abhinavk
2021-03-27 11:02 ` [PATCH v3 16/25] drm/msm/dpu: simplify vco_delay handling in dsi_phy_28nm driver Dmitry Baryshkov
2021-03-30 0:03 ` [Freedreno] " abhinavk
2021-03-27 11:02 ` [PATCH v3 17/25] drm/msi/dsi: inline msm_dsi_pll_helper_clk_prepare/unprepare Dmitry Baryshkov
2021-03-30 0:50 ` [Freedreno] " abhinavk
2021-03-27 11:02 ` [PATCH v3 18/25] drm/msm/dsi: make save_state/restore_state callbacks accept msm_dsi_phy Dmitry Baryshkov
2021-03-30 3:09 ` abhinavk
2021-03-27 11:02 ` [PATCH v3 19/25] drm/msm/dsi: drop msm_dsi_pll abstracton Dmitry Baryshkov
2021-03-30 3:13 ` [Freedreno] " abhinavk
2021-03-30 3:35 ` abhinavk
2021-03-27 11:03 ` [PATCH v3 20/25] drm/msm/dsi: drop PLL accessor functions Dmitry Baryshkov
2021-03-30 3:16 ` [Freedreno] " abhinavk
2021-03-27 11:03 ` [PATCH v3 21/25] drm/msm/dsi: move ioremaps to dsi_phy_driver_probe Dmitry Baryshkov
2021-03-30 3:18 ` [Freedreno] " abhinavk
2021-03-27 11:03 ` [PATCH v3 22/25] drm/msm/dsi: remove duplicate fields from dsi_pll_Nnm instances Dmitry Baryshkov
2021-03-30 3:23 ` abhinavk
2021-03-27 11:03 ` [PATCH v3 23/25] drm/msm/dsi: remove temp data from global pll structure Dmitry Baryshkov
2021-03-30 3:26 ` [Freedreno] " abhinavk
2021-03-30 15:23 ` Dmitry Baryshkov
2021-03-27 11:03 ` [PATCH v3 24/25] drm/msm/dsi: inline msm_dsi_phy_set_src_pll Dmitry Baryshkov
2021-03-30 3:34 ` [Freedreno] " abhinavk
2021-03-30 13:42 ` Dmitry Baryshkov
2021-03-30 17:44 ` abhinavk
2021-03-27 11:03 ` [PATCH v3 25/25] drm/msm/dsi: stop passing src_pll_id to the phy_enable call Dmitry Baryshkov
2021-03-30 19:29 ` [Freedreno] " abhinavk
2021-03-30 1:31 ` [PATCH v3 00/25] drm/msm/dsi: refactor MSM DSI PHY/PLL drivers Stephen Boyd
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