From: "周琰杰 (Zhou Yanjie)" <zhouyanjie@wanyeetech.com>
To: linux-mips@vger.kernel.org
Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, paul@crapouillou.net,
mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org,
mark.rutland@arm.com, ralf@linux-mips.org, paulburton@kernel.org,
jiaxun.yang@flygoat.com, chenhc@lemote.com, allison@lohutok.net,
tglx@linutronix.de, daniel.lezcano@linaro.org,
geert+renesas@glider.be, krzk@kernel.org, keescook@chromium.org,
ebiederm@xmission.com, miquel.raynal@bootlin.com,
paul@boddie.org.uk, hns@goldelico.com, sernia.zhou@foxmail.com,
zhenwenjin@gmail.com, mips-creator-ci20-dev@googlegroups.com,
1326991897@qq.com
Subject: [PATCH v4 3/6] dt-bindings: MIPS: Document Ingenic SoCs binding.
Date: Sat, 15 Feb 2020 02:02:37 +0800 [thread overview]
Message-ID: <1581703360-112557-5-git-send-email-zhouyanjie@wanyeetech.com> (raw)
In-Reply-To: <1581703360-112557-1-git-send-email-zhouyanjie@wanyeetech.com>
Document the available properties for the SoC root node and the
CPU nodes of the devicetree for the Ingenic XBurst SoCs.
Tested-by: H. Nikolaus Schaller <hns@goldelico.com>
Tested-by: Paul Boddie <paul@boddie.org.uk>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
---
Notes:
v1->v2:
Change the two Document from txt to yaml.
v2->v3:
Fix formatting errors.
v3->v4:
Fix bugs in the two yaml files.
.../bindings/mips/ingenic/ingenic,cpu.yaml | 53 ++++++++++++++++++++++
.../bindings/mips/ingenic/ingenic,soc.yaml | 35 ++++++++++++++
2 files changed, 88 insertions(+)
create mode 100755 Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml
create mode 100755 Documentation/devicetree/bindings/mips/ingenic/ingenic,soc.yaml
diff --git a/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml
new file mode 100644
index 00000000..cb600ae
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mips/ingenic/ingenic,cpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Bindings for Ingenic XBurst family CPUs
+
+maintainers:
+ - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
+description: |
+ Ingenic XBurst family CPUs shall have the following properties.
+
+properties:
+ compatible:
+ oneOf:
+ - const: ingenic,xburst
+ - const: ingenic,xburst2
+
+ reg:
+ description: |
+ The number of the CPU.
+
+required:
+ - device_type
+ - compatible
+ - reg
+
+examples:
+ - |
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "ingenic,xburst";
+ reg = <0>;
+
+ clocks = <&cgu JZ4780_CLK_CPU>;
+ clock-names = "cpu";
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "ingenic,xburst";
+ reg = <1>;
+
+ clocks = <&cgu JZ4780_CLK_CORE1>;
+ clock-names = "cpu";
+ };
+ };
+...
diff --git a/Documentation/devicetree/bindings/mips/ingenic/ingenic,soc.yaml b/Documentation/devicetree/bindings/mips/ingenic/ingenic,soc.yaml
new file mode 100644
index 00000000..11e5cde
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ingenic/ingenic,soc.yaml
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mips/ingenic/ingenic,soc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Bindings for Ingenic SoCs with XBurst CPU inside.
+
+maintainers:
+ - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
+description: |
+ Ingenic SoCs with XBurst CPU inside shall have the following properties.
+
+properties:
+ compatible:
+ oneOf:
+ - const: ingenic,jz4740
+ - const: ingenic,jz4725b
+ - const: ingenic,jz4760
+ - const: ingenic,jz4760b
+ - const: ingenic,jz4770
+ - const: ingenic,jz4780
+ - const: ingenic,x1000
+ - const: ingenic,x1000e
+ - const: ingenic,x1500
+
+required:
+ - compatible
+
+examples:
+ - |
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ingenic,jz4780";
+...
--
2.7.4
next prev parent reply other threads:[~2020-02-14 18:04 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-14 18:02 Introduce SMP support for CI20 (based on JZ4780) v4 周琰杰 (Zhou Yanjie)
2020-02-14 18:02 ` [PATCH v4 0/6] Introduce SMP support for JZ4780 周琰杰 (Zhou Yanjie)
2020-02-14 18:02 ` [PATCH v4 1/6] MIPS: JZ4780: Introduce SMP support 周琰杰 (Zhou Yanjie)
2020-02-14 18:21 ` Paul Cercueil
2020-02-15 14:03 ` Zhou Yanjie
2020-02-15 15:03 ` afzal mohammed
2020-02-15 16:17 ` Zhou Yanjie
2020-02-14 18:02 ` [PATCH v4 2/6] clocksource: Ingenic: Add high resolution timer support for SMP 周琰杰 (Zhou Yanjie)
2020-02-14 18:31 ` Paul Cercueil
2020-02-15 14:04 ` Zhou Yanjie
2020-02-14 18:02 ` 周琰杰 (Zhou Yanjie) [this message]
2020-02-14 18:02 ` [PATCH v4 4/6] MIPS: Ingenic: Add 'cpus' node for Ingenic SoCs 周琰杰 (Zhou Yanjie)
2020-02-14 18:02 ` [PATCH v4 5/6] MIPS: CI20: Modify DTS to support high resolution timer for SMP 周琰杰 (Zhou Yanjie)
2020-02-14 18:37 ` Paul Cercueil
2020-02-15 14:05 ` Zhou Yanjie
2020-02-14 18:02 ` [PATCH v4 6/6] MIPS: CI20: Update defconfig to support SMP 周琰杰 (Zhou Yanjie)
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