From: Gregory CLEMENT <gregory.clement@bootlin.com>
To: Stephen Boyd <sboyd@codeaurora.org>,
Mike Turquette <mturquette@baylibre.com>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: "Rob Herring" <robh+dt@kernel.org>,
devicetree@vger.kernel.org, "Jason Cooper" <jason@lakedaemon.net>,
"Andrew Lunn" <andrew@lunn.ch>,
"Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com>,
"Gregory CLEMENT" <gregory.clement@bootlin.com>,
"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
linux-arm-kernel@lists.infradead.org,
"Antoine Tenart" <antoine.tenart@bootlin.com>,
"Miquèl Raynal" <miquel.raynal@bootlin.com>,
"Maxime Chevallier" <maxime.chevallier@bootlin.com>
Subject: [PATCH v3 4/6] clk: mvebu: ap806: Fix clock name for the cluster
Date: Sun, 16 Dec 2018 10:41:45 +0100 [thread overview]
Message-ID: <20181216094147.6468-5-gregory.clement@bootlin.com> (raw)
In-Reply-To: <20181216094147.6468-1-gregory.clement@bootlin.com>
Actually, the clocks exposed for the cluster are not the CPU clocks, but
the PLL clock used as entry clock for the CPU clocks. The CPU clock will
be managed by a driver submitting in the following patches.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
drivers/clk/mvebu/ap806-system-controller.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/mvebu/ap806-system-controller.c b/drivers/clk/mvebu/ap806-system-controller.c
index 0a58824ff053..73ba8fd7860f 100644
--- a/drivers/clk/mvebu/ap806-system-controller.c
+++ b/drivers/clk/mvebu/ap806-system-controller.c
@@ -97,7 +97,7 @@ static int ap806_syscon_common_probe(struct platform_device *pdev,
cpuclk_freq *= 1000 * 1000;
/* CPU clocks depend on the Sample At Reset configuration */
- name = ap_cp_unique_name(dev, syscon_node, "cpu-cluster-0");
+ name = ap_cp_unique_name(dev, syscon_node, "pll-cluster-0");
ap806_clks[0] = clk_register_fixed_rate(dev, name, NULL,
0, cpuclk_freq);
if (IS_ERR(ap806_clks[0])) {
@@ -105,7 +105,7 @@ static int ap806_syscon_common_probe(struct platform_device *pdev,
goto fail0;
}
- name = ap_cp_unique_name(dev, syscon_node, "cpu-cluster-1");
+ name = ap_cp_unique_name(dev, syscon_node, "pll-cluster-1");
ap806_clks[1] = clk_register_fixed_rate(dev, name, NULL, 0,
cpuclk_freq);
if (IS_ERR(ap806_clks[1])) {
--
2.19.2
next prev parent reply other threads:[~2018-12-16 9:42 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-16 9:41 [PATCH v3 0/6] Add CPU clock support for Armada 7K/8K Gregory CLEMENT
2018-12-16 9:41 ` [PATCH v3 1/6] dt-bindings: ap806: add the cluster clock node in the syscon file Gregory CLEMENT
2018-12-17 22:50 ` Rob Herring
2018-12-18 15:46 ` Gregory CLEMENT
2018-12-16 9:41 ` [PATCH v3 2/6] clk: mvebu: add helper file for Armada AP and CP clocks Gregory CLEMENT
2018-12-16 9:41 ` [PATCH v3 3/6] clk: mvebu: add CPU clock driver for Armada 7K/8K Gregory CLEMENT
2018-12-16 9:41 ` Gregory CLEMENT [this message]
2018-12-16 9:41 ` [PATCH v3 5/6] arm64: marvell: enable the Armada 7K/8K CPU clk driver Gregory CLEMENT
2018-12-16 9:41 ` [PATCH v3 6/6] arm64: dts: marvell: Add cpu clock node on Armada 7K/8K Gregory CLEMENT
2019-01-10 16:16 ` [PATCH v3 0/6] Add CPU clock support for " Gregory CLEMENT
[not found] ` <154713766177.15366.14948014236046606980@swboyd.mtv.corp.google.com>
2019-01-10 16:36 ` Gregory CLEMENT
2019-02-13 8:57 ` Gregory CLEMENT
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