From: Paul Cercueil <paul@crapouillou.net>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, Paul Cercueil <paul@crapouillou.net>
Subject: [PATCH 2/2] clk: ingenic: jz4725b: Add UDC PHY clock
Date: Tue, 19 Mar 2019 15:05:36 +0100 [thread overview]
Message-ID: <20190319140536.27945-2-paul@crapouillou.net> (raw)
In-Reply-To: <20190319140536.27945-1-paul@crapouillou.net>
Add clock for the USB Device Controller PHY.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
drivers/clk/ingenic/jz4725b-cgu.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/ingenic/jz4725b-cgu.c b/drivers/clk/ingenic/jz4725b-cgu.c
index 584ff4ff81c7..8901ea0295b7 100644
--- a/drivers/clk/ingenic/jz4725b-cgu.c
+++ b/drivers/clk/ingenic/jz4725b-cgu.c
@@ -205,6 +205,12 @@ static const struct ingenic_cgu_clk_info jz4725b_cgu_clocks[] = {
.parents = { JZ4725B_CLK_EXT512, JZ4725B_CLK_OSC32K, -1, -1 },
.mux = { CGU_REG_OPCR, 2, 1},
},
+
+ [JZ4725B_CLK_UDC_PHY] = {
+ "udc_phy", CGU_CLK_GATE,
+ .parents = { JZ4725B_CLK_EXT, -1, -1, -1 },
+ .gate = { CGU_REG_OPCR, 6, true },
+ },
};
static void __init jz4725b_cgu_init(struct device_node *np)
--
2.11.0
next prev parent reply other threads:[~2019-03-19 14:05 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-19 14:05 [PATCH 1/2] dt-bindings: clock: jz4725b-cgu: Add UDC PHY clock Paul Cercueil
2019-03-19 14:05 ` Paul Cercueil [this message]
2019-04-11 20:41 ` [PATCH 2/2] clk: ingenic: jz4725b: " Stephen Boyd
2019-03-31 6:40 ` [PATCH 1/2] dt-bindings: clock: jz4725b-cgu: " Rob Herring
2019-04-11 20:41 ` Stephen Boyd
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