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From: Lukasz Luba <l.luba@partner.samsung.com>
To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
	linux-clk@vger.kernel.org
Cc: mturquette@baylibre.com, sboyd@kernel.org,
	b.zolnierkie@samsung.com, krzk@kernel.org, kgene@kernel.org,
	cw00.choi@samsung.com, kyungmin.park@samsung.com,
	m.szyprowski@samsung.com, s.nawrocki@samsung.com,
	myungjoo.ham@samsung.com, keescook@chromium.org,
	tony@atomide.com, jroedel@suse.de, treding@nvidia.com,
	digetx@gmail.com, gregkh@linuxfoundation.org,
	willy.mh.wolff.ml@gmail.com,
	Lukasz Luba <l.luba@partner.samsung.com>
Subject: [PATCH v10 11/13] ARM: dts: exynos: add syscon to clock compatible
Date: Fri, 14 Jun 2019 11:53:07 +0200	[thread overview]
Message-ID: <20190614095309.24100-12-l.luba@partner.samsung.com> (raw)
In-Reply-To: <20190614095309.24100-1-l.luba@partner.samsung.com>

In order to get the clock by phandle and use it with regmap it needs to be
compatible with syscon. The DMC driver uses two registers from clock
register set and needs the regmap of them.

Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
---
 arch/arm/boot/dts/exynos5420.dtsi | 2 +-
 arch/arm/boot/dts/exynos5800.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 5fb2326875dc..d153617ff1a3 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -173,7 +173,7 @@
 		};
 
 		clock: clock-controller@10010000 {
-			compatible = "samsung,exynos5420-clock";
+			compatible = "samsung,exynos5420-clock", "syscon";
 			reg = <0x10010000 0x30000>;
 			#clock-cells = <1>;
 		};
diff --git a/arch/arm/boot/dts/exynos5800.dtsi b/arch/arm/boot/dts/exynos5800.dtsi
index 57d3b319fd65..0a2b3287ed92 100644
--- a/arch/arm/boot/dts/exynos5800.dtsi
+++ b/arch/arm/boot/dts/exynos5800.dtsi
@@ -17,7 +17,7 @@
 };
 
 &clock {
-	compatible = "samsung,exynos5800-clock";
+	compatible = "samsung,exynos5800-clock", "syscon";
 };
 
 &cluster_a15_opp_table {
-- 
2.17.1


  parent reply	other threads:[~2019-06-14  9:53 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20190614095319eucas1p2d47b6bd9179c7e4190972d6b22092ad7@eucas1p2.samsung.com>
2019-06-14  9:52 ` [PATCH v10 00/13] Exynos5 Dynamic Memory Controller driver Lukasz Luba
     [not found]   ` <CGME20190614095320eucas1p2919a6169c997bb81c80416e8a0ede538@eucas1p2.samsung.com>
2019-06-14  9:52     ` [PATCH v10 01/13] clk: samsung: add needed IDs for DMC clocks in Exynos5420 Lukasz Luba
2019-06-14 12:04       ` Krzysztof Kozlowski
2019-06-14 12:38         ` Sylwester Nawrocki
2019-06-14 12:39           ` Krzysztof Kozlowski
     [not found]   ` <CGME20190614095321eucas1p2af62f3cdf78ba3c5a8013159da4f7502@eucas1p2.samsung.com>
2019-06-14  9:52     ` [PATCH v10 02/13] clk: samsung: add new clocks for DMC for Exynos5422 SoC Lukasz Luba
     [not found]   ` <CGME20190614095323eucas1p1312dd7bcc5a25cbb3af28ed0f52dc7a6@eucas1p1.samsung.com>
2019-06-14  9:52     ` [PATCH v10 03/13] clk: samsung: add BPLL rate table for Exynos 5422 SoC Lukasz Luba
     [not found]   ` <CGME20190614095324eucas1p2eab4def0ed8c912303e4bb3e422bb255@eucas1p2.samsung.com>
2019-06-14  9:53     ` [PATCH v10 04/13] dt-bindings: ddr: rename lpddr2 directory Lukasz Luba
     [not found]   ` <CGME20190614095324eucas1p247ee87a9ca69733e7aebd601f5d96a94@eucas1p2.samsung.com>
2019-06-14  9:53     ` [PATCH v10 05/13] dt-bindings: ddr: add LPDDR3 memories Lukasz Luba
     [not found]   ` <CGME20190614095325eucas1p20083d9290b36eca945ec3f1428bdbd4f@eucas1p2.samsung.com>
2019-06-14  9:53     ` [PATCH v10 06/13] drivers: memory: extend of_memory by LPDDR3 support Lukasz Luba
2019-06-14 12:43       ` Krzysztof Kozlowski
2019-08-22 13:34         ` Lukasz Luba
2019-09-04 11:52           ` Greg KH
     [not found]   ` <CGME20190614095326eucas1p22e27d86d886d7a33acdd59c7f0f6d7d8@eucas1p2.samsung.com>
2019-06-14  9:53     ` [PATCH v10 07/13] dt-bindings: memory-controllers: add Exynos5422 DMC device description Lukasz Luba
     [not found]   ` <CGME20190614095327eucas1p19b6e522efa15c8fd21c51f3900e376e9@eucas1p1.samsung.com>
2019-06-14  9:53     ` [PATCH v10 08/13] drivers: memory: add DMC driver for Exynos5422 Lukasz Luba
2019-06-14 12:09       ` Krzysztof Kozlowski
2019-06-14 12:58       ` Krzysztof Kozlowski
2019-06-14 13:40         ` Lukasz Luba
2019-06-14 13:46           ` Krzysztof Kozlowski
2019-06-14 13:47       ` Krzysztof Kozlowski
2019-06-25 11:26         ` Lukasz Luba
     [not found]   ` <CGME20190614095328eucas1p24009b3a07322fd12e49eabb7a08baf50@eucas1p2.samsung.com>
2019-06-14  9:53     ` [PATCH v10 09/13] drivers: devfreq: events: add Exynos PPMU new events Lukasz Luba
2019-06-22 13:10       ` Chanwoo Choi
2019-06-25  7:31         ` Lukasz Luba
2019-06-25  7:38           ` Chanwoo Choi
     [not found]   ` <CGME20190614095329eucas1p267244e53d4f5612c46d6cc2c6bc0ed75@eucas1p2.samsung.com>
2019-06-14  9:53     ` [PATCH v10 10/13] ARM: dts: exynos: add chipid label and syscon compatible Lukasz Luba
     [not found]   ` <CGME20190614095330eucas1p1e5a73f31251af7d16caf951054ec9def@eucas1p1.samsung.com>
2019-06-14  9:53     ` Lukasz Luba [this message]
     [not found]   ` <CGME20190614095331eucas1p138707301cac47902f0d0d9a41bd4a8a4@eucas1p1.samsung.com>
2019-06-14  9:53     ` [PATCH v10 12/13] ARM: dts: exynos: add DMC device for exynos5422 Lukasz Luba
     [not found]   ` <CGME20190614095332eucas1p10e0a690604c6210d5f61c55175532785@eucas1p1.samsung.com>
2019-06-14  9:53     ` [PATCH v10 13/13] ARM: exynos_defconfig: enable DMC driver Lukasz Luba

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