On Thu, Aug 08, 2019 at 04:46:51PM -0700, Sowjanya Komatineni wrote: > This patch adds suspend and resume pm ops for cpufreq driver. > > PLLP is the safe clock source for CPU during system suspend and > resume as PLLP rate is below the CPU Fmax at Vmin. > > CPUFreq driver suspend switches the CPU clock source to PLLP and > disables the DFLL clock. > > During system resume, warmboot code powers up the CPU with PLLP > clock source. So CPUFreq driver resume enabled DFLL clock and > switches CPU back to DFLL clock source. > > Acked-by: Viresh Kumar > Reviewed-by: Dmitry Osipenko > Signed-off-by: Sowjanya Komatineni > --- > drivers/cpufreq/tegra124-cpufreq.c | 60 ++++++++++++++++++++++++++++++++++++++ > 1 file changed, 60 insertions(+) > > diff --git a/drivers/cpufreq/tegra124-cpufreq.c b/drivers/cpufreq/tegra124-cpufreq.c > index 4f0c637b3b49..e979a3370988 100644 > --- a/drivers/cpufreq/tegra124-cpufreq.c > +++ b/drivers/cpufreq/tegra124-cpufreq.c > @@ -6,6 +6,7 @@ > #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt > > #include > +#include > #include > #include > #include > @@ -128,8 +129,67 @@ static int tegra124_cpufreq_probe(struct platform_device *pdev) > return ret; > } > > +static int __maybe_unused tegra124_cpufreq_suspend(struct device *dev) > +{ > + struct tegra124_cpufreq_priv *priv = dev_get_drvdata(dev); > + int err; > + > + /* > + * PLLP rate 408Mhz is below the CPU Fmax at Vmin and is safe to > + * use during suspend and resume. So, switch the CPU clock source > + * to PLLP and disable DFLL. > + */ > + err = clk_set_parent(priv->cpu_clk, priv->pllp_clk); > + if (err < 0) { > + dev_err(dev, "failed to reparent to PLLP: %d\n", err); > + return err; > + } > + > + /* disable DFLL clock */ > + clk_disable_unprepare(priv->dfll_clk); This comment is superfluous since it doesn't explain anything that the code below doesn't explain already. Not sure who will end up merging this. If not me, then this is: Acked-by: Thierry Reding