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From: Jernej Skrabec <jernej.skrabec@siol.net>
To: mripard@kernel.org, wens@csie.org
Cc: mturquette@baylibre.com, sboyd@kernel.org, icenowy@aosc.io,
	jernej.skrabec@siol.net, linux-arm-kernel@lists.infradead.org,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH 2/7] clk: sunxi-ng: sun8i-de2: Split out H5 definitions
Date: Mon, 10 Feb 2020 23:28:02 +0100	[thread overview]
Message-ID: <20200210222807.206426-3-jernej.skrabec@siol.net> (raw)
In-Reply-To: <20200210222807.206426-1-jernej.skrabec@siol.net>

H5 has less clocks and resets than A64. Currently that's not obvious
because A64 is missing rotation core related clocks and reset.

Split out H5 definition. A64 structures will be fixed in subsequent
commit.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
 drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
index a928e0c32222..f449c22e59e8 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
@@ -192,6 +192,12 @@ static struct ccu_reset_map sun50i_a64_de2_resets[] = {
 	[RST_WB]	= { 0x08, BIT(2) },
 };
 
+static struct ccu_reset_map sun50i_h5_de2_resets[] = {
+	[RST_MIXER0]	= { 0x08, BIT(0) },
+	[RST_MIXER1]	= { 0x08, BIT(1) },
+	[RST_WB]	= { 0x08, BIT(2) },
+};
+
 static struct ccu_reset_map sun50i_h6_de3_resets[] = {
 	[RST_MIXER0]	= { 0x08, BIT(0) },
 	[RST_MIXER1]	= { 0x08, BIT(1) },
@@ -239,6 +245,16 @@ static const struct sunxi_ccu_desc sun50i_a64_de2_clk_desc = {
 	.num_resets	= ARRAY_SIZE(sun50i_a64_de2_resets),
 };
 
+static const struct sunxi_ccu_desc sun50i_h5_de2_clk_desc = {
+	.ccu_clks	= sun8i_h3_de2_clks,
+	.num_ccu_clks	= ARRAY_SIZE(sun8i_h3_de2_clks),
+
+	.hw_clks	= &sun8i_h3_de2_hw_clks,
+
+	.resets		= sun50i_h5_de2_resets,
+	.num_resets	= ARRAY_SIZE(sun50i_h5_de2_resets),
+};
+
 static const struct sunxi_ccu_desc sun50i_h6_de3_clk_desc = {
 	.ccu_clks	= sun50i_h6_de3_clks,
 	.num_ccu_clks	= ARRAY_SIZE(sun50i_h6_de3_clks),
@@ -347,7 +363,7 @@ static const struct of_device_id sunxi_de2_clk_ids[] = {
 	},
 	{
 		.compatible = "allwinner,sun50i-h5-de2-clk",
-		.data = &sun50i_a64_de2_clk_desc,
+		.data = &sun50i_h5_de2_clk_desc,
 	},
 	{
 		.compatible = "allwinner,sun50i-h6-de3-clk",
-- 
2.25.0


  parent reply	other threads:[~2020-02-10 22:28 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-10 22:28 [PATCH 0/7] clk: sunxi-ng: sun8i-de2: Multiple fixes Jernej Skrabec
2020-02-10 22:28 ` [PATCH 1/7] clk: sunxi-ng: sun8i-de2: Sort structures Jernej Skrabec
2020-02-11  6:40   ` Chen-Yu Tsai
2020-02-10 22:28 ` Jernej Skrabec [this message]
2020-02-11  7:36   ` [PATCH 2/7] clk: sunxi-ng: sun8i-de2: Split out H5 definitions Chen-Yu Tsai
2020-02-10 22:28 ` [PATCH 3/7] clk: sunxi-ng: sun8i-de2: Add rotation core clocks and reset for A64 Jernej Skrabec
2020-02-10 22:28 ` [PATCH 4/7] clk: sunxi-ng: sun8i-de2: H6 doesn't have rotate core Jernej Skrabec
2020-02-10 22:28 ` [PATCH 5/7] clk: sunxi-ng: sun8i-de2: Don't reuse A83T resets Jernej Skrabec
2020-02-10 22:28 ` [PATCH 6/7] clk: sunxi-ng: sun8i-de2: Add rotation core clocks and reset for A83T Jernej Skrabec
2020-02-10 22:28 ` [PATCH 7/7] clk: sunxi-ng: sun8i-de2: Add R40 specific quirks Jernej Skrabec

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