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From: Sasha Levin <sashal@kernel.org>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>,
	Masahiro Yamada <yamada.masahiro@socionext.com>,
	Stephen Boyd <sboyd@kernel.org>, Sasha Levin <sashal@kernel.org>,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH AUTOSEL 5.4 244/459] clk: uniphier: Add SCSSI clock gate for each channel
Date: Fri, 14 Feb 2020 10:58:14 -0500	[thread overview]
Message-ID: <20200214160149.11681-244-sashal@kernel.org> (raw)
In-Reply-To: <20200214160149.11681-1-sashal@kernel.org>

From: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

[ Upstream commit 1ec09a2ec67a0baa46a3ccac041dbcdbc6db2cb9 ]

SCSSI has clock gates for each channel in the SoCs newer than Pro4,
so this adds missing clock gates for channel 1, 2 and 3. And more, this
moves MCSSI clock ID after SCSSI.

Fixes: ff388ee36516 ("clk: uniphier: add clock frequency support for SPI")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Link: https://lkml.kernel.org/r/1577410925-22021-1-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
 drivers/clk/uniphier/clk-uniphier-peri.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/uniphier/clk-uniphier-peri.c b/drivers/clk/uniphier/clk-uniphier-peri.c
index 9caa52944b1c5..3e32db9dad815 100644
--- a/drivers/clk/uniphier/clk-uniphier-peri.c
+++ b/drivers/clk/uniphier/clk-uniphier-peri.c
@@ -18,8 +18,8 @@
 #define UNIPHIER_PERI_CLK_FI2C(idx, ch)					\
 	UNIPHIER_CLK_GATE("i2c" #ch, (idx), "i2c", 0x24, 24 + (ch))
 
-#define UNIPHIER_PERI_CLK_SCSSI(idx)					\
-	UNIPHIER_CLK_GATE("scssi", (idx), "spi", 0x20, 17)
+#define UNIPHIER_PERI_CLK_SCSSI(idx, ch)				\
+	UNIPHIER_CLK_GATE("scssi" #ch, (idx), "spi", 0x20, 17 + (ch))
 
 #define UNIPHIER_PERI_CLK_MCSSI(idx)					\
 	UNIPHIER_CLK_GATE("mcssi", (idx), "spi", 0x24, 14)
@@ -35,7 +35,7 @@ const struct uniphier_clk_data uniphier_ld4_peri_clk_data[] = {
 	UNIPHIER_PERI_CLK_I2C(6, 2),
 	UNIPHIER_PERI_CLK_I2C(7, 3),
 	UNIPHIER_PERI_CLK_I2C(8, 4),
-	UNIPHIER_PERI_CLK_SCSSI(11),
+	UNIPHIER_PERI_CLK_SCSSI(11, 0),
 	{ /* sentinel */ }
 };
 
@@ -51,7 +51,10 @@ const struct uniphier_clk_data uniphier_pro4_peri_clk_data[] = {
 	UNIPHIER_PERI_CLK_FI2C(8, 4),
 	UNIPHIER_PERI_CLK_FI2C(9, 5),
 	UNIPHIER_PERI_CLK_FI2C(10, 6),
-	UNIPHIER_PERI_CLK_SCSSI(11),
-	UNIPHIER_PERI_CLK_MCSSI(12),
+	UNIPHIER_PERI_CLK_SCSSI(11, 0),
+	UNIPHIER_PERI_CLK_SCSSI(12, 1),
+	UNIPHIER_PERI_CLK_SCSSI(13, 2),
+	UNIPHIER_PERI_CLK_SCSSI(14, 3),
+	UNIPHIER_PERI_CLK_MCSSI(15),
 	{ /* sentinel */ }
 };
-- 
2.20.1


      parent reply	other threads:[~2020-02-14 16:07 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20200214160149.11681-1-sashal@kernel.org>
2020-02-14 15:54 ` [PATCH AUTOSEL 5.4 016/459] clk: meson: g12a: fix missing uart2 in regmap table Sasha Levin
2020-02-14 15:54 ` [PATCH AUTOSEL 5.4 017/459] clk: meson: pll: Fix by 0 division in __pll_params_to_rate() Sasha Levin
2020-02-14 15:54 ` [PATCH AUTOSEL 5.4 041/459] clk: at91: sam9x60: fix programmable clock prescaler Sasha Levin
2020-02-14 15:54 ` [PATCH AUTOSEL 5.4 043/459] clk: meson: meson8b: make the CCF use the glitch-free mali mux Sasha Levin
2020-02-14 15:55 ` [PATCH AUTOSEL 5.4 075/459] clk: ti: dra7: fix parent for gmac_clkctrl Sasha Levin
2020-02-14 15:56 ` [PATCH AUTOSEL 5.4 111/459] clk: qcom: Don't overwrite 'cfg' in clk_rcg2_dfs_populate_freq() Sasha Levin
2020-02-14 15:56 ` [PATCH AUTOSEL 5.4 112/459] clk: qcom: rcg2: Don't crash if our parent can't be found; return an error Sasha Levin
2020-02-14 15:57 ` [PATCH AUTOSEL 5.4 171/459] clk: imx: Add correct failure handling for clk based helpers Sasha Levin
2020-02-14 15:57 ` [PATCH AUTOSEL 5.4 205/459] clk: qcom: smd: Add missing bimc clock Sasha Levin
2020-02-14 15:57 ` [PATCH AUTOSEL 5.4 213/459] clk: renesas: rcar-gen3: Allow changing the RPC[D2] clocks Sasha Levin
2020-02-14 15:57 ` [PATCH AUTOSEL 5.4 223/459] clk: actually call the clock init before any other callback of the clock Sasha Levin
2020-02-14 15:58 ` [PATCH AUTOSEL 5.4 241/459] clk: sunxi-ng: add mux and pll notifiers for A64 CPU clock Sasha Levin
2020-02-14 15:58 ` [PATCH AUTOSEL 5.4 243/459] clk: Use parent node pointer during registration if necessary Sasha Levin
2020-02-14 15:58 ` Sasha Levin [this message]

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