From: Dmitry Osipenko <digetx@gmail.com>
To: Sowjanya Komatineni <skomatineni@nvidia.com>,
thierry.reding@gmail.com, jonathanh@nvidia.com,
frankc@nvidia.com, hverkuil@xs4all.nl, helen.koike@collabora.com
Cc: sboyd@kernel.org, linux-media@vger.kernel.org,
devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH v5 5/9] dt-binding: tegra: Add VI and CSI bindings
Date: Tue, 24 Mar 2020 22:20:01 +0300 [thread overview]
Message-ID: <2256dc66-f3f9-3400-85e9-0641729b1316@gmail.com> (raw)
In-Reply-To: <1584985955-19101-6-git-send-email-skomatineni@nvidia.com>
23.03.2020 20:52, Sowjanya Komatineni пишет:
> Tegra contains VI controller which can support up to 6 MIPI CSI
> camera sensors.
>
> Each Tegra CSI port from CSI unit can be one-to-one mapper to
> VI channel and can capture from an external camera sensor or
> from built-in test pattern generator.
>
> This patch adds dt-bindings for Tegra VI and CSI.
>
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
> ---
> .../display/tegra/nvidia,tegra20-host1x.txt | 67 +++++++++++++++++-----
> 1 file changed, 54 insertions(+), 13 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
> index 9999255..9421569 100644
> --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
> +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
> @@ -40,14 +40,25 @@ of the following host1x client modules:
>
> Required properties:
> - compatible: "nvidia,tegra<chip>-vi"
> - - reg: Physical base address and length of the controller's registers.
> + - reg: Physical base address and length of the controller registers.
> - interrupts: The interrupt outputs from the controller.
> - - clocks: Must contain one entry, for the module clock.
> + - clocks: Must contain an entry for the module clock "vi"
> See ../clocks/clock-bindings.txt for details.
> - - resets: Must contain an entry for each entry in reset-names.
> - See ../reset/reset.txt for details.
> - - reset-names: Must include the following entries:
> - - vi
This should be a wrong change because ARM32 Tegra SoCs do not use power
domain.
> + - power-domains: Must include venc powergate node as vi is in VE partition.
next prev parent reply other threads:[~2020-03-24 19:20 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-23 17:52 [RFC PATCH v5 0/9] Add Tegra driver for video capture Sowjanya Komatineni
2020-03-23 17:52 ` [RFC PATCH v5 1/9] arm64: tegra: Fix sor powergate clocks and reset Sowjanya Komatineni
2020-03-23 17:52 ` [RFC PATCH v5 2/9] arm64: tegra: Add reset-cells to mc Sowjanya Komatineni
2020-03-23 17:52 ` [RFC PATCH v5 3/9] dt-bindings: clock: tegra: Add clk id for CSI TPG clock Sowjanya Komatineni
2020-03-23 17:52 ` [RFC PATCH v5 4/9] clk: tegra: Add Tegra210 CSI TPG clock gate Sowjanya Komatineni
2020-03-23 17:52 ` [RFC PATCH v5 5/9] dt-binding: tegra: Add VI and CSI bindings Sowjanya Komatineni
2020-03-24 19:20 ` Dmitry Osipenko [this message]
2020-03-24 21:16 ` Sowjanya Komatineni
2020-03-23 17:52 ` [RFC PATCH v5 6/9] media: tegra: Add Tegra210 Video input driver Sowjanya Komatineni
2020-03-25 0:34 ` Dmitry Osipenko
2020-03-25 1:08 ` Sowjanya Komatineni
2020-03-25 1:15 ` Sowjanya Komatineni
2020-03-25 19:43 ` Dmitry Osipenko
[not found] ` <20200325110358.GB853@valkosipuli.retiisi.org.uk>
2020-03-25 11:09 ` Hans Verkuil
[not found] ` <a219aeb2-3d00-016e-eed9-503a9fbd0d13@nvidia.com>
2020-03-26 14:48 ` Sakari Ailus
2020-03-26 17:04 ` Sowjanya Komatineni
2020-03-30 10:59 ` Hans Verkuil
2020-03-31 10:32 ` Sakari Ailus
2020-03-31 10:56 ` Hans Verkuil
2020-03-31 11:10 ` Sakari Ailus
2020-03-31 11:27 ` Hans Verkuil
2020-03-31 11:52 ` Laurent Pinchart
2020-03-31 16:40 ` Sowjanya Komatineni
2020-03-31 18:33 ` Sowjanya Komatineni
2020-04-01 16:36 ` Sowjanya Komatineni
2020-04-01 16:58 ` Laurent Pinchart
2020-04-01 18:24 ` Sowjanya Komatineni
2020-04-03 7:36 ` Sowjanya Komatineni
2020-03-23 17:52 ` [RFC PATCH v5 7/9] MAINTAINERS: Add Tegra Video driver section Sowjanya Komatineni
2020-03-23 17:52 ` [RFC PATCH v5 8/9] dt-bindings: reset: Add ID for Tegra210 VI reset Sowjanya Komatineni
2020-03-23 17:52 ` [RFC PATCH v5 9/9] arm64: tegra: Add Tegra VI CSI support in device tree Sowjanya Komatineni
2020-03-24 19:19 ` Dmitry Osipenko
2020-03-24 21:04 ` Sowjanya Komatineni
2020-03-24 22:48 ` Dmitry Osipenko
2020-03-25 0:01 ` Sowjanya Komatineni
2020-03-25 0:22 ` Dmitry Osipenko
2020-03-30 10:04 ` [RFC PATCH v5 0/9] Add Tegra driver for video capture Hans Verkuil
2020-03-30 11:02 ` Hans Verkuil
2020-03-30 16:16 ` Sowjanya Komatineni
2020-04-03 5:45 ` Sowjanya Komatineni
2020-04-03 7:19 ` Hans Verkuil
2020-04-03 7:31 ` Sowjanya Komatineni
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