linux-clk.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Krzysztof Kozlowski <krzk@kernel.org>
To: Palmer Dabbelt <palmer@dabbelt.com>, daire.mcnamara@microchip.com
Cc: mturquette@baylibre.com, sboyd@kernel.org,
	linux-clk@vger.kernel.org, robh+dt@kernel.org,
	devicetree@vger.kernel.org, cyril.jean@microchip.com,
	conor.dooley@microchip.com, david.abdurachmanov@gmail.com
Subject: Re: [PATCH v5 2/2 resend] clk: microchip: Add driver for Microchip PolarFire SoC
Date: Tue, 9 Nov 2021 14:10:52 +0100	[thread overview]
Message-ID: <488b7821-674f-61ff-a960-ba3f650d3a78@kernel.org> (raw)
In-Reply-To: <mhng-2e959dbf-7344-4ddc-b133-06ef3c5abccf@palmerdabbelt-glaptop>

On 18/08/2021 23:09, Palmer Dabbelt wrote:
> On Wed, 18 Aug 2021 07:11:02 PDT (-0700), daire.mcnamara@microchip.com wrote:
>> From: Daire McNamara <daire.mcnamara@microchip.com>
>>
>> Add support for clock configuration on Microchip PolarFire SoC
>>
>> Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com>
>> ---
>>  drivers/clk/Kconfig              |   1 +
>>  drivers/clk/Makefile             |   2 +-
>>  drivers/clk/microchip/Kconfig    |   7 +
>>  drivers/clk/microchip/Makefile   |   6 +-
>>  drivers/clk/microchip/clk-mpfs.c | 444 +++++++++++++++++++++++++++++++
>>  5 files changed, 457 insertions(+), 3 deletions(-)
>>  create mode 100644 drivers/clk/microchip/Kconfig
>>  create mode 100644 drivers/clk/microchip/clk-mpfs.c
>>
>> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
>> index a588d56502d4..ab604dd02acf 100644
>> --- a/drivers/clk/Kconfig
>> +++ b/drivers/clk/Kconfig
>> @@ -388,6 +388,7 @@ source "drivers/clk/keystone/Kconfig"
>>  source "drivers/clk/mediatek/Kconfig"
>>  source "drivers/clk/meson/Kconfig"
>>  source "drivers/clk/mstar/Kconfig"
>> +source "drivers/clk/microchip/Kconfig"
>>  source "drivers/clk/mvebu/Kconfig"
>>  source "drivers/clk/qcom/Kconfig"
>>  source "drivers/clk/renesas/Kconfig"
>> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
>> index b22ae4f81e0b..fb87a18ae8ec 100644
>> --- a/drivers/clk/Makefile
>> +++ b/drivers/clk/Makefile
>> @@ -89,7 +89,7 @@ obj-$(CONFIG_ARCH_KEYSTONE)		+= keystone/
>>  obj-$(CONFIG_MACH_LOONGSON32)		+= loongson1/
>>  obj-y					+= mediatek/
>>  obj-$(CONFIG_ARCH_MESON)		+= meson/
>> -obj-$(CONFIG_MACH_PIC32)		+= microchip/
>> +obj-y					+= microchip/
>>  ifeq ($(CONFIG_COMMON_CLK), y)
>>  obj-$(CONFIG_ARCH_MMP)			+= mmp/
>>  endif
>> diff --git a/drivers/clk/microchip/Kconfig b/drivers/clk/microchip/Kconfig
>> new file mode 100644
>> index 000000000000..f5edc7b3c07c
>> --- /dev/null
>> +++ b/drivers/clk/microchip/Kconfig
>> @@ -0,0 +1,7 @@
>> +# SPDX-License-Identifier: GPL-2.0
>> +
>> +config MCHP_CLK_MPFS
>> +	bool "Clk driver for PolarFire SoC"
>> +	depends on (RISCV && SOC_MICROCHIP_POLARFIRE) || COMPILE_TEST
> 
> This shouldn't depend on the SOC config.  Those were meant to just 
> enable a set of drivers, not restrict what can be enabled. 

The kernel config is overwhelmed with amount of choices of drivers, so
it is quite common to restrict the choices of subarch-specific drivers
to these sub-architectures. That's how many, if not most, of ARM v7 and
ARMv8 drivers are restricted. Some other RISC-V drivers follow this
concept (git grep SOC_CANAAN, git grep SOC_SIFIVE) because it is
friendly for people configuring kernels. Why making configuration choice
more difficult and show the SoC-specific clock driver to every other
platform (when this SoC is not used)?

Best regards,
Krzysztof

  reply	other threads:[~2021-11-09 13:10 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-18 14:11 [PATCH v5 0/2 resend] CLK: microchip: Add clkcfg driver for Microchip PolarFire SoC daire.mcnamara
2021-08-18 14:11 ` [PATCH v5 1/2 resend] dt-bindings: clk: microchip: Add Microchip PolarFire host binding daire.mcnamara
2021-08-18 18:57   ` Rob Herring
2021-08-26 18:33   ` Stephen Boyd
2021-08-18 14:11 ` [PATCH v5 2/2 resend] clk: microchip: Add driver for Microchip PolarFire SoC daire.mcnamara
2021-08-18 21:09   ` Palmer Dabbelt
2021-11-09 13:10     ` Krzysztof Kozlowski [this message]
2021-11-25 13:53       ` Geert Uytterhoeven

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=488b7821-674f-61ff-a960-ba3f650d3a78@kernel.org \
    --to=krzk@kernel.org \
    --cc=conor.dooley@microchip.com \
    --cc=cyril.jean@microchip.com \
    --cc=daire.mcnamara@microchip.com \
    --cc=david.abdurachmanov@gmail.com \
    --cc=devicetree@vger.kernel.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=mturquette@baylibre.com \
    --cc=palmer@dabbelt.com \
    --cc=robh+dt@kernel.org \
    --cc=sboyd@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).