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From: Liang Yang <liang.yang@amlogic.com>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: Stephen Boyd <sboyd@kernel.org>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Kevin Hilman <khilman@baylibre.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>, <linux-clk@vger.kernel.org>,
	Jianxin Pan <jianxin.pan@amlogic.com>,
	Victor Wan <victor.wan@amlogic.com>,
	XianWei Zhao <xianwei.zhao@amlogic.com>,
	Kelvin Zhang <kelvin.zhang@amlogic.com>,
	BiChao Zheng <bichao.zheng@amlogic.com>,
	YongHui Yu <yonghui.yu@amlogic.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-amlogic@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v9 3/4] clk: meson: add DT documentation for emmc clock controller
Date: Mon, 17 Jan 2022 15:03:47 +0800	[thread overview]
Message-ID: <8783eb66-16ee-3b8b-5d55-73b49deab3a2@amlogic.com> (raw)
In-Reply-To: <CAFBinCDkNk+Ba340vshhL2rE76U9qb_dZ5ZsgWnMgFYpL6i1jA@mail.gmail.com>

Hi Martin,

On 2022/1/15 8:09, Martin Blumenstingl wrote:
> [ EXTERNAL EMAIL ]
> 
> Hi Liang,
> 
> On Fri, Jan 14, 2022 at 4:06 AM Liang Yang <liang.yang@amlogic.com> wrote:
> [...]
>>>> +properties:
>>>> +  compatible:
>>>> +    enum:
>>>> +      - "amlogic,axg-mmc-clkc", "syscon"
>>>
>>> Why is it a syscon?
>>
>> The register documented by reg is shared with SD/eMMC controller port C,
>> and it need to be ops on NFC driver.
> Can you please share an example how the .dts would look like in the
> end for two example cases:
> 1) using the sd_emmc_c MMC interface > 2) not using the MMC interface of sd_emmc_c but only using it's clocks
> for the NFC
I think both EMMC(although it is not implemented by 'axg-mmc-clkc'  yet) 
and NAND clock have the same way in dts:
		......
		clocks = <&clkc CLKID_SD_EMMC_C>,
			<&sd_emmc_c_clkc CLKID_MMC_DIV>,
			<&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>,
			<&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>;
		clock-names = "core", "device", "rx", "tx";
		amlogic,mmc-syscon = <&sd_emmc_c_clkc>;
		......

> 
> Initially I wanted to suggest the usage of a sub-node with compatible
> = "mmc-slot" (see
> Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdio.txt for an
> example) to decide whether the MMC controller is registered or whether
> just the clock controller is registered.
> However, the mmc-slot compatible string is not documented in
> Documentation/devicetree/bindings/mmc/mmc-controller.yaml currently.
> Maybe the MMC maintainers have any suggestions if other IPs have
> similar requirements (for IPs with shared parts).
> 
> 
> Best regards,
> Martin
> 
> .

  reply	other threads:[~2022-01-17  7:03 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-13 11:57 [PATCH v9 0/4] clk: meson: add a sub EMMC clock controller support Liang Yang
2022-01-13 11:57 ` [PATCH v9 1/4] clk: meson: add one based divider support for sclk Liang Yang
2022-01-13 21:28   ` Stephen Boyd
2022-01-14  3:07     ` Liang Yang
2022-01-13 11:57 ` [PATCH v9 2/4] clk: meson: add emmc sub clock phase delay driver Liang Yang
2022-01-13 21:29   ` Stephen Boyd
2022-01-14  3:08     ` Liang Yang
2022-01-13 11:57 ` [PATCH v9 3/4] clk: meson: add DT documentation for emmc clock controller Liang Yang
2022-01-13 21:29   ` Stephen Boyd
2022-01-14  3:06     ` Liang Yang
2022-01-14 22:59       ` Stephen Boyd
2022-01-17  2:43         ` Liang Yang
2022-01-15  0:09       ` Martin Blumenstingl
2022-01-17  7:03         ` Liang Yang [this message]
2022-01-13 11:57 ` [PATCH v9 4/4] clk: meson: add sub MMC clock controller driver Liang Yang
2022-01-13 21:35   ` Stephen Boyd
2022-01-14  5:14     ` Liang Yang
2022-01-14 23:01       ` Stephen Boyd
2022-01-17  6:24         ` Liang Yang
2022-01-19  2:22           ` Stephen Boyd
2022-01-19  2:55             ` Liang Yang
  -- strict thread matches above, loose matches on Subject: below --
2019-01-08 13:50 [PATCH RESEND v9 0/4] clk: meson: add a sub EMMC clock controller support Jianxin Pan
2019-01-08 13:50 ` [PATCH v9 3/4] clk: meson: add DT documentation for emmc clock controller Jianxin Pan
2019-01-22  9:27   ` Jerome Brunet

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