From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.6 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ABEF2C43215 for ; Thu, 14 Nov 2019 05:31:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 96D4F206F4 for ; Thu, 14 Nov 2019 05:31:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="VV0JlZag" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726828AbfKNFbM (ORCPT ); Thu, 14 Nov 2019 00:31:12 -0500 Received: from mail-ed1-f65.google.com ([209.85.208.65]:38689 "EHLO mail-ed1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726002AbfKNFbM (ORCPT ); Thu, 14 Nov 2019 00:31:12 -0500 Received: by mail-ed1-f65.google.com with SMTP id s10so3938800edi.5; Wed, 13 Nov 2019 21:31:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=TzmgwadFXzZqxttyAmTgdsuksZq1HRvUtDJR5tFWxuQ=; b=VV0JlZagHNRuPaMn1sjANDQ9gpxP4PposXxyDDWOdRN9Ug5hZqW76uGYAx2eU+2/Ei jKkqh+/st/tBOFGfgr8wCN1cHx8574paDQuD0rJb/2/DjvAs4WjENBTDG7zRtvSuSOYe 7cUoNA/3y0KHwWxyoE3xVkx3AOSXN5Ra2fiWzHBmLHCcGnFWdIjv/2ehSnuprAu0gyQE 8yt+Bj4v5rIAPKADiEVui/sGy0RKhmysnwSffXlmySh3HhJXv+7zDPCYm/dPaWs/TDKp 4jTbNYcHP8kUMlA3ZqsuGvMZVe47zIIJgyhdrk5IGug+2i74zv23cxY9plGzpuFwEAdJ xqxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=TzmgwadFXzZqxttyAmTgdsuksZq1HRvUtDJR5tFWxuQ=; b=WFO7k7ak0xsoOI5eJzmo8DLCHmaUkyhqfI6OsiMs+w8eCGvLP5gnvaJyMX8T+Tme+Q rDTrJPId/D2Nv9+PtJJUdVGMV1prrmHUIPGA8tC3wbHjY54p3wx9qV5p8clFi18/aHOD 2+4jLASk7u3ZPkkMbVll/xy1x4pL443lo9+6uooitcdXASARw6gjH9XKgCEjnKdgvQ4w e+XBhNAi4/LXXA2a1bqy6kcHjVxC1JC0eVWRXHtsTlmQfsgcJKlUc95dWU2s5A7mOqNB CUmqGmyYQmjw190c57tWx/aVQc7h0Pq22m9bJRrOfuasGFAU1o3sl66Fm7Cldgj7fNP8 DRKQ== X-Gm-Message-State: APjAAAWMAInRqQCW9nl2D6tTFZrSwbj6Rhx674//NMxXDP1rTXxG8T+w Lau/31rZb0UVWYzCovo93fA2aMnOnO2p6k3REMUAZx14 X-Google-Smtp-Source: APXvYqwDNsw+CPEHfZ6k5bmbg5vzATln7nGrYepvMbZNyvUl0vpAhTIKh7dE4xMDDTS34JhNjAwAWCEYTF3XbMTlrZg= X-Received: by 2002:aa7:d3da:: with SMTP id o26mr8077190edr.302.1573709469321; Wed, 13 Nov 2019 21:31:09 -0800 (PST) MIME-Version: 1.0 References: <20191014102308.27441-6-tdas@codeaurora.org> <20191029175941.GA27773@google.com> <20191031174149.GD27773@google.com> <20191107210606.E536F21D79@mail.kernel.org> <20191108063543.0262921882@mail.kernel.org> <20191108184207.334DD21848@mail.kernel.org> <20191114010210.GF27773@google.com> In-Reply-To: <20191114010210.GF27773@google.com> From: Rob Clark Date: Wed, 13 Nov 2019 21:30:57 -0800 Message-ID: Subject: Re: [PATCH v4 5/5] clk: qcom: Add Global Clock controller (GCC) driver for SC7180 To: Matthias Kaehlcke Cc: Rob Clark , Stephen Boyd , Taniya Das , Michael Turquette , David Brown , Rajendra Nayak , linux-arm-msm , "open list:ARM/QUALCOMM SUPPORT" , linux-clk , LKML , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Rob Herring , Rob Herring , Jordan Crouse , Jeykumar Sankaran , Sean Paul Content-Type: text/plain; charset="UTF-8" Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org On Wed, Nov 13, 2019 at 5:03 PM Matthias Kaehlcke wrote: > > On Fri, Nov 08, 2019 at 11:40:53AM -0800, Rob Clark wrote: > > On Fri, Nov 8, 2019 at 10:42 AM Stephen Boyd wrote: > > > > > > Quoting Rob Clark (2019-11-08 08:54:23) > > > > On Thu, Nov 7, 2019 at 10:35 PM Stephen Boyd wrote: > > > > > > > > > > Quoting Rob Clark (2019-11-07 18:06:19) > > > > > > On Thu, Nov 7, 2019 at 1:06 PM Stephen Boyd wrote: > > > > > > > > > > > > > > > > > > > > > NULL is a valid clk pointer returned by clk_get(). What is the display > > > > > > > driver doing that makes it consider NULL an error? > > > > > > > > > > > > > > > > > > > do we not have an iface clk? I think the driver assumes we should > > > > > > have one, rather than it being an optional thing.. we could ofc change > > > > > > that > > > > > > > > > > I think some sort of AHB clk is always enabled so the plan is to just > > > > > hand back NULL to the caller when they call clk_get() on it and nobody > > > > > should be the wiser when calling clk APIs with a NULL iface clk. The > > > > > common clk APIs typically just return 0 and move along. Of course, we'll > > > > > also turn the clk on in the clk driver so that hardware can function > > > > > properly, but we don't need to expose it as a clk object and all that > > > > > stuff if we're literally just slamming a bit somewhere and never looking > > > > > back. > > > > > > > > > > But it sounds like we can't return NULL for this clk for some reason? I > > > > > haven't tried to track it down yet but I think Matthias has found it > > > > > causes some sort of problem in the display driver. > > > > > > > > > > > > > ok, I guess we can change the dpu code to allow NULL.. but what would > > > > the return be, for example on a different SoC where we do have an > > > > iface clk, but the clk driver isn't enabled? Would that also return > > > > NULL? I guess it would be nice to differentiate between those cases.. > > > > > > > > > > So the scenario is DT describes the clk > > > > > > dpu_node { > > > clocks = <&cc AHB_CLK>; > > > clock-names = "iface"; > > > } > > > > > > but the &cc node has a driver that doesn't probe? > > > > > > I believe in this scenario we return -EPROBE_DEFER because we assume we > > > should wait for the clk driver to probe and provide the iface clk. See > > > of_clk_get_hw_from_clkspec() and how it looks through a list of clk > > > providers and tries to match the &cc phandle to some provider. > > > > > > Once the driver probes, the match will happen and we'll be able to look > > > up the clk in the provider with __of_clk_get_hw_from_provider(). If > > > the clk provider decides that there isn't a clk object, it will return > > > NULL and then eventually clk_hw_create_clk() will turn the NULL return > > > value into a NULL pointer to return from clk_get(). > > > > > > > ok, that was the scenario I was worried about (since unclk'd register > > access tends to be insta-reboot and hard to debug).. so I think it > > should be ok to make dpu just ignore NULL clks. > > > > From a quick look, I think something like the attached (untested). > > The driver appears to be happy with it, at least at probe() time. Ok, I suppose I should re-send the dpu patch to the appropriate lists.. does that count as a Tested-by? BR, -R