From: Biju Das <biju.das.jz@bp.renesas.com>
To: Sergei Shtylyov <sergei.shtylyov@gmail.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
"linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
Chris Paterson <Chris.Paterson2@renesas.com>,
Biju Das <biju.das@bp.renesas.com>,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: RE: [PATCH net-next 02/18] drivers: clk: renesas: rzg2l-cpg: Add support to handle MUX clocks
Date: Fri, 23 Jul 2021 12:12:45 +0000 [thread overview]
Message-ID: <OS0PR01MB5922CA9C7E6C8341B0A0D31C86E59@OS0PR01MB5922.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <9871f557-0088-bc51-d793-58c410269de9@gmail.com>
Hi Sergei,
Thanks for the review.
> Subject: Re: [PATCH net-next 02/18] drivers: clk: renesas: rzg2l-cpg: Add
> support to handle MUX clocks
>
> Hello!
>
> On 22.07.2021 17:13, Biju Das wrote:
>
> > Add support to handle mux clocks inorder to select a clock source
>
> In order.
Ok.
>
> > from multiple sources.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > ---
> > drivers/clk/renesas/rzg2l-cpg.c | 24 ++++++++++++++++++++++++
> > drivers/clk/renesas/rzg2l-cpg.h | 9 +++++++++
> > 2 files changed, 33 insertions(+)
> >
> > diff --git a/drivers/clk/renesas/rzg2l-cpg.c
> > b/drivers/clk/renesas/rzg2l-cpg.c index 3b3b2c3347f3..491b10da5766
> > 100644
> > --- a/drivers/clk/renesas/rzg2l-cpg.c
> > +++ b/drivers/clk/renesas/rzg2l-cpg.c
> > @@ -130,6 +130,27 @@ rzg2l_cpg_div_clk_register(const struct
> cpg_core_clk *core,
> > return clk_hw->clk;
> > }
> >
> > +static struct clk * __init
> > +rzg2l_cpg_mux_clk_register(const struct cpg_core_clk *core,
> > + void __iomem *base,
> > + struct rzg2l_cpg_priv *priv)
> > +{
> > + const struct clk_hw *clk_hw;
> > +
> > + clk_hw = devm_clk_hw_register_mux(priv->dev, core->name,
> > + core->parent_names, core->num_parents,
> > + core->flag,
> > + base + GET_REG_OFFSET(core->conf),
> > + GET_SHIFT(core->conf),
> > + GET_WIDTH(core->conf),
> > + core->mux_flags, &priv->rmw_lock);
> > +
>
> Empty line is hardly needed here...
OK. Will fix it in next version.
Cheers,
Biju
next prev parent reply other threads:[~2021-07-23 12:12 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20210722141351.13668-1-biju.das.jz@bp.renesas.com>
2021-07-22 14:13 ` [PATCH net-next 02/18] drivers: clk: renesas: rzg2l-cpg: Add support to handle MUX clocks Biju Das
2021-07-23 10:26 ` Sergei Shtylyov
2021-07-23 12:12 ` Biju Das [this message]
2021-07-26 10:53 ` Geert Uytterhoeven
2021-07-26 12:23 ` Biju Das
2021-07-22 14:13 ` [PATCH net-next 03/18] drivers: clk: renesas: r9a07g044-cpg: Add ethernet clock sources Biju Das
2021-07-26 10:50 ` Geert Uytterhoeven
2021-07-26 11:43 ` Biju Das
2021-07-26 11:50 ` Geert Uytterhoeven
2021-07-22 14:13 ` [PATCH net-next 04/18] drivers: clk: renesas: r9a07g044-cpg: Add GbEthernet clock/reset Biju Das
2021-07-26 10:11 ` Geert Uytterhoeven
2021-07-26 10:18 ` Biju Das
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