From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.skyhub.de (mail.skyhub.de [5.9.137.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B735E2FAD for ; Fri, 13 Aug 2021 10:47:08 +0000 (UTC) Received: from zn.tnic (p200300ec2f0a0d0079874d21390dee82.dip0.t-ipconnect.de [IPv6:2003:ec:2f0a:d00:7987:4d21:390d:ee82]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id CB1E81EC0390; Fri, 13 Aug 2021 12:47:02 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1628851622; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=XmnLEzAhzOr7go9Tws2WK6fpL+x7aLZgyQqDx6MzxiE=; b=K7pPLi+l6xsBgICUo31Urs0pNH4asQI3bGtJ3ZL06c0vaRJVCEnWEAirmzYhQYnNvpoBmR bC9rrsPLK3gHgK1reXS8f7LGdgNZGiXNBuGJsT8HMbMIG0vRBzPzUijsRpRFIW7P/lbRPP MSBF/r3NSFBWWbXBRI4N672W+nm0UBY= Date: Fri, 13 Aug 2021 12:47:41 +0200 From: Borislav Petkov To: Brijesh Singh Cc: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org, Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Gonda , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , Dov Murik , Tobin Feldman-Fitzthum , Michael Roth , Vlastimil Babka , tony.luck@intel.com, npmccallum@redhat.com, brijesh.ksingh@gmail.com Subject: Re: [PATCH Part1 RFC v4 10/36] x86/compressed: Register GHCB memory when SEV-SNP is active Message-ID: References: <20210707181506.30489-1-brijesh.singh@amd.com> <20210707181506.30489-11-brijesh.singh@amd.com> Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20210707181506.30489-11-brijesh.singh@amd.com> On Wed, Jul 07, 2021 at 01:14:40PM -0500, Brijesh Singh wrote: > diff --git a/arch/x86/include/asm/sev-common.h b/arch/x86/include/asm/sev-common.h > index aee07d1bb138..b19d8d301f5d 100644 > --- a/arch/x86/include/asm/sev-common.h > +++ b/arch/x86/include/asm/sev-common.h > @@ -45,6 +45,17 @@ > (((unsigned long)reg & GHCB_MSR_CPUID_REG_MASK) << GHCB_MSR_CPUID_REG_POS) | \ > (((unsigned long)fn) << GHCB_MSR_CPUID_FUNC_POS)) > > +/* GHCB GPA Register */ > +#define GHCB_MSR_GPA_REG_REQ 0x012 > +#define GHCB_MSR_GPA_REG_VALUE_POS 12 > +#define GHCB_MSR_GPA_REG_GFN_MASK GENMASK_ULL(51, 0) > +#define GHCB_MSR_GPA_REQ_GFN_VAL(v) \ > + (((unsigned long)((v) & GHCB_MSR_GPA_REG_GFN_MASK) << GHCB_MSR_GPA_REG_VALUE_POS)| \ > + GHCB_MSR_GPA_REG_REQ) > + > +#define GHCB_MSR_GPA_REG_RESP 0x013 > +#define GHCB_MSR_GPA_REG_RESP_VAL(v) ((v) >> GHCB_MSR_GPA_REG_VALUE_POS) Simplify... -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette